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| author | Richard Hughes <richard@hughsie.com> | 2018-12-19 12:04:30 +0000 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-02-11 23:50:12 +0000 |
| commit | db7482bb72035fab8386226d1720cde09e0c700e (patch) | |
| tree | 8a2114a45c22a44e01d8494f224b38c35b17cb71 | |
| parent | e2cbb12f2209a0ba16bc87e31d544fd7fc47f0e2 (diff) | |
| download | flashrom-db7482bb72035fab8386226d1720cde09e0c700e.tar.gz flashrom-db7482bb72035fab8386226d1720cde09e0c700e.tar.bz2 flashrom-db7482bb72035fab8386226d1720cde09e0c700e.zip | |
Fix several -Wno-implicit-fallthrough warnings
GCC is picky about the comment being where the break should go.
Change-Id: I05db2fb34025fefe2c6ddd1274c8e45b7cc5a4b6
Signed-off-by: Richard Hughes <richard@hughsie.com>
Reviewed-on: https://review.coreboot.org/c/30406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | ich_descriptors.c | 2 | ||||
| -rw-r--r-- | ichspi.c | 4 | ||||
| -rw-r--r-- | sb600spi.c | 1 | ||||
| -rw-r--r-- | spi25_statusreg.c | 5 |
4 files changed, 9 insertions, 3 deletions
diff --git a/ich_descriptors.c b/ich_descriptors.c index 56e846f00..944af4c06 100644 --- a/ich_descriptors.c +++ b/ich_descriptors.c @@ -69,6 +69,7 @@ ssize_t ich_number_of_masters(const enum ich_chipset cs, const struct ich_desc_c case CHIPSET_C620_SERIES_LEWISBURG: if (cont->NM <= MAX_NUM_MASTERS) return cont->NM; + break; default: if (cont->NM < MAX_NUM_MASTERS) return cont->NM + 1; @@ -238,6 +239,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value) case CHIPSET_ICH10: if (value > 1) return "reserved"; + /* Fall through. */ case CHIPSET_5_SERIES_IBEX_PEAK: case CHIPSET_6_SERIES_COUGAR_POINT: case CHIPSET_7_SERIES_PANTHER_POINT: @@ -891,7 +891,7 @@ static int ich7_run_opcode(OPCODE op, uint32_t offset, case 2: /* Select second preop. */ temp16 |= SPIC_SPOP; - /* And fall through. */ + /* Fall through. */ case 1: /* Atomic command (preop+op) */ temp16 |= SPIC_ACS; @@ -1013,7 +1013,7 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset, case 2: /* Select second preop. */ temp32 |= SSFC_SPOP; - /* And fall through. */ + /* Fall through. */ case 1: /* Atomic command (preop+op) */ temp32 |= SSFC_ACS; diff --git a/sb600spi.c b/sb600spi.c index 1e2e5d5a1..1efb2ce86 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -638,6 +638,7 @@ int sb600_probe_spi(struct pci_dev *dev) switch (amd_gen) { case CHIPSET_SB7XX: msg_pdbg(", DropOneClkOnRd/SpiClkGate=%i", (tmp >> 28) & 0x1); + /* Fall through. */ case CHIPSET_SB89XX: case CHIPSET_HUDSON234: case CHIPSET_YANGTZE: diff --git a/spi25_statusreg.c b/spi25_statusreg.c index a5fb3b8bd..4cf702323 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -269,19 +269,22 @@ static void spi_prettyprint_status_register_welwip(uint8_t status) static void spi_prettyprint_status_register_bp(uint8_t status, int bp) { switch (bp) { - /* Fall through. */ case 4: msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n", (status & (1 << 6)) ? "" : "not "); + /* Fall through. */ case 3: msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n", (status & (1 << 5)) ? "" : "not "); + /* Fall through. */ case 2: msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n", (status & (1 << 4)) ? "" : "not "); + /* Fall through. */ case 1: msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n", (status & (1 << 3)) ? "" : "not "); + /* Fall through. */ case 0: msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n", (status & (1 << 2)) ? "" : "not "); |