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author | Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> | 2011-07-25 17:25:24 +0000 |
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committer | Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> | 2011-07-25 17:25:24 +0000 |
commit | a08d0f2242a0a5370ed00e6f26be7aef977dd028 (patch) | |
tree | a1b3079aaf6f5f4c88076f4aed59447b1310e5ba | |
parent | 6d71530d430bb3b9d93611e6db7c06c8fe043270 (diff) | |
download | flashrom-a08d0f2242a0a5370ed00e6f26be7aef977dd028.tar.gz flashrom-a08d0f2242a0a5370ed00e6f26be7aef977dd028.tar.bz2 flashrom-a08d0f2242a0a5370ed00e6f26be7aef977dd028.zip |
Add support for the GIGABYTE GA-8SIMLH board
The usage of the GPIO output register as bitmap can be confirmed from the
vendor board enable code, so the comment has been deleted. It really is
(1<<gpionumber).
flashrom -V: http://paste.flashrom.org/view.php?id=728
lspci: http://paste.flashrom.org/view.php?id=729
superiotool: http://paste.flashrom.org/view.php?id=730
test report: http://paste.flashrom.org/view.php?id=733
Corresponding to flashrom svn r1385.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
-rw-r--r-- | board_enable.c | 9 | ||||
-rw-r--r-- | print.c | 1 |
2 files changed, 6 insertions, 4 deletions
diff --git a/board_enable.c b/board_enable.c index 5cb0613ef..f83c765c4 100644 --- a/board_enable.c +++ b/board_enable.c @@ -1725,12 +1725,13 @@ static int via_apollo_gpo0_lower(void) } /* - * Enable some GPIO pin on SiS southbridge. + * Enable some GPIO pin on SiS southbridge and enables SIO flash writes. * * Suited for: * - MSI 651M-L: SiS651 / SiS962 + * - GIGABYTE GA-8SIMLH */ -static int board_msi_651ml(void) +static int sis_gpio0_raise_and_w836xx_memw(void) { struct pci_dev *dev; uint16_t base, temp; @@ -1741,7 +1742,6 @@ static int board_msi_651ml(void) return 1; } - /* Registers 68 and 64 seem like bitmaps. */ base = pci_read_word(dev, 0x74); temp = INW(base + 0x68); temp &= ~(1 << 0); /* Make pin output? */ @@ -2035,6 +2035,7 @@ const struct board_pciid_enable board_pciid_enables[] = { {0x1106, 0x0686, 0x1106, 0x0686, 0x1106, 0x3058, 0x1458, 0xa000, NULL, NULL, NULL, P3, "GIGABYTE", "GA-7ZM", 512, OK, NULL}, {0x8086, 0x2570, 0x1458, 0x2570, 0x8086, 0x24d0, 0, 0, "^8IP775/-G$",NULL, NULL, P3, "GIGABYTE", "GA-8IP775", 0, OK, intel_ich_gpio32_raise}, {0x8086, 0x244b, 0x8086, 0x2442, 0x8086, 0x2445, 0x1458, 0xa002, NULL, NULL, NULL, P3, "GIGABYTE", "GA-8IRML", 0, OK, intel_ich_gpio25_raise}, + {0x1039, 0x0651, 0x1039, 0x0651, 0x1039, 0x7002, 0x1458, 0x5004, "^GA-8SIMLH$",NULL, NULL, P3, "GIGABYTE", "GA-8SIMLH", 0, OK, sis_gpio0_raise_and_w836xx_memw}, {0x8086, 0x24c3, 0x1458, 0x24c2, 0x8086, 0x24cd, 0x1458, 0x5004, NULL, NULL, NULL, P3, "GIGABYTE", "GA-8PE667 Ultra 2", 0, OK, intel_ich_gpio32_raise}, {0x10DE, 0x02F1, 0x1458, 0x5000, 0x10DE, 0x0261, 0x1458, 0x5001, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8N51GMF", 0, OK, nvidia_mcp_gpio3b_raise}, {0x10DE, 0x026C, 0x1458, 0xA102, 0x10DE, 0x0260, 0x1458, 0x5001, NULL, NULL, NULL, P3, "GIGABYTE", "GA-K8N51GMF-9", 0, OK, nvidia_mcp_gpio3b_raise}, @@ -2063,7 +2064,7 @@ const struct board_pciid_enable board_pciid_enables[] = { {0x1106, 0x0571, 0x1462, 0x7120, 0x1106, 0x3065, 0x1462, 0x7120, NULL, NULL, NULL, P3, "MSI", "MS-6712 (KT4V)", 0, OK, board_msi_kt4v}, {0x1106, 0x3148, 0 , 0 , 0x1106, 0x3177, 0 , 0 , NULL, "msi", "ms6787", P3, "MSI", "MS-6787 (P4MAM-V/P4MAM-L)", 0, OK, w836xx_memw_enable_2e}, {0x8086, 0x24d3, 0x1462, 0x7880, 0x8086, 0x2570, 0, 0, NULL, NULL, NULL, P3, "MSI", "MS-6788-040 (848P NeoV)", 0, OK, intel_ich_gpio32_raise}, - {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, P3, "MSI", "MS-7005 (651M-L)", 0, OK, board_msi_651ml}, + {0x1039, 0x7012, 0x1462, 0x0050, 0x1039, 0x6325, 0x1462, 0x0058, NULL, NULL, NULL, P3, "MSI", "MS-7005 (651M-L)", 0, OK, sis_gpio0_raise_and_w836xx_memw}, {0x10DE, 0x00E0, 0x1462, 0x0250, 0x10DE, 0x00E1, 0x1462, 0x0250, NULL, NULL, NULL, P3, "MSI", "MS-7025 (K8N Neo2 Platinum)", 0, OK, nvidia_mcp_gpio0c_raise}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, NULL, P3, "MSI", "MS-7046", 0, OK, intel_ich_gpio19_raise}, {0x8086, 0x244b, 0x1462, 0x3910, 0x8086, 0x2442, 0x1462, 0x3910, NULL, NULL, NULL, P3, "MSI", "MS-6391 (845 Pro4)", 0, OK, intel_ich_gpio23_raise}, @@ -534,6 +534,7 @@ const struct board_info boards_known[] = { B("GIGABYTE", "GA-7ZM", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1366", "Works fine if you remove jumper JP9 on the board and disable the flash protection BIOS option."), B("GIGABYTE", "GA-8IP775", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1830", NULL), B("GIGABYTE", "GA-8IRML", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1343", NULL), + B("GIGABYTE", "GA-8SIMLH", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1399", NULL), B("GIGABYTE", "GA-8PE667 Ultra 2", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=1607", NULL), B("GIGABYTE", "GA-965GM-S2 (rev. 2.0)", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2617", NULL), B("GIGABYTE", "GA-965P-DS4", 1, "http://www.gigabyte.com/products/product-page.aspx?pid=2288", NULL), |