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| author | Edward O'Callaghan <quasisec@google.com> | 2022-10-25 09:41:07 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2022-11-03 23:57:38 +0000 |
| commit | 54f864779b60754c129845d106641458297f1fc3 (patch) | |
| tree | 71c2586820575de60c26489ac84c66fe7f3ea9f5 | |
| parent | c0fefa8084b31c523efbeb2cce10c4afab2016d5 (diff) | |
| download | flashrom-54f864779b60754c129845d106641458297f1fc3.tar.gz flashrom-54f864779b60754c129845d106641458297f1fc3.tar.bz2 flashrom-54f864779b60754c129845d106641458297f1fc3.zip | |
ichspi.c: heap allocate hwseq_data to remove global
Align hwseq path in ichspi with the rest of the flashrom tree
by making hwseq_data a heap allocation within the life-time of
the driver managed by the driver registration API.
Change-Id: Ib362c5ab2d3e8afee2c3c7d3135cc4414d6bd6c3
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
| -rw-r--r-- | ichspi.c | 24 |
1 files changed, 18 insertions, 6 deletions
@@ -1255,13 +1255,13 @@ static int ich_spi_send_command(const struct flashctx *flash, unsigned int write return result; } -static struct hwseq_data { +struct hwseq_data { uint32_t size_comp0; uint32_t size_comp1; uint32_t addr_mask; bool only_4k; uint32_t hsfc_fcycle; -} g_hwseq_data; +}; static struct hwseq_data *get_hwseq_data_from_context(const struct flashctx *flash) { @@ -1591,6 +1591,12 @@ static int ich_hwseq_write(struct flashctx *flash, const uint8_t *buf, unsigned return 0; } +static int ich_hwseq_shutdown(void *data) +{ + free(data); + return 0; +} + static int ich_spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds) { @@ -1804,6 +1810,7 @@ static const struct opaque_master opaque_master_ich_hwseq = { .erase = ich_hwseq_block_erase, .read_register = ich_hwseq_read_status, .write_register = ich_hwseq_write_status, + .shutdown = ich_hwseq_shutdown, }; static int init_ich7_spi(void *spibar, enum ich_chipset ich_gen) @@ -1947,7 +1954,8 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum enum ich_spi_mode ich_spi_mode = ich_auto; size_t num_freg, num_pr, reg_pr0; - init_chipset_properties(&swseq_data, &g_hwseq_data, &num_freg, &num_pr, ®_pr0, ich_gen); + struct hwseq_data hwseq_data; + init_chipset_properties(&swseq_data, &hwseq_data, &num_freg, &num_pr, ®_pr0, ich_gen); int ret = get_ich_spi_mode_param(cfg, &ich_spi_mode); if (ret) @@ -2167,16 +2175,20 @@ static int init_ich_default(const struct programmer_cfg *cfg, void *spibar, enum msg_perr("Could not determine density of flash component %d.\n", 0); return ERROR_FATAL; } - g_hwseq_data.size_comp0 = tmpi; + hwseq_data.size_comp0 = tmpi; tmpi = getFCBA_component_density(ich_gen, &desc, 1); if (tmpi < 0) { msg_perr("Could not determine density of flash component %d.\n", 1); return ERROR_FATAL; } - g_hwseq_data.size_comp1 = tmpi; + hwseq_data.size_comp1 = tmpi; - register_opaque_master(&opaque_master_ich_hwseq, &g_hwseq_data); + struct hwseq_data *opaque_hwseq_data = calloc(1, sizeof(struct hwseq_data)); + if (!opaque_hwseq_data) + return ERROR_FATAL; + memcpy(opaque_hwseq_data, &hwseq_data, sizeof(*opaque_hwseq_data)); + register_opaque_master(&opaque_master_ich_hwseq, opaque_hwseq_data); } else { register_spi_master(&spi_master_ich9, NULL); } |