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authorSergii Dmytruk <sergii.dmytruk@3mdeb.com>2022-10-06 18:17:58 +0300
committerAnastasia Klimchuk <aklm@chromium.org>2022-10-23 22:00:37 +0000
commitbd8a02de6cd9a6fb909be7e246ab7bb0dc558798 (patch)
tree40a99da95b3a6b287f67a5fc5501caed5e475131
parent5f3d3fad3ccbaa366ccd9bc9a743bdf5a9500b5f (diff)
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flashchips.c: mark WP of 9 entries as tested
This is based on information from: * commit a850fd0aa8054a1125a9231fa3317428f15900f4 - GD25LQ128C/GD25LQ128D/GD25LQ128E - GD25LQ64(B) - GD25Q127C/GD25Q128C - GD25Q256D/GD25Q256E - GD25Q64(B) * commit a8204dd34d90ac9ab2783e1dd486ec781d4c0dba - GD25Q32(B) * commit 7b4c4f36113c4b7ed5c985d4cf51733639e69bf8 - W25Q64BV/W25Q64CV/W25Q64FV * https://github.com/Dasharo/dasharo-issues/issues/67 - W25Q128.V..M * https://github.com/Dasharo/flashrom/pull/8 - W25Q64.W Change-Id: I090188bad568885f78778e7fc7d8dbe20fb2445f Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Tested-by: Nikolai Artemiev <nartemiev@google.com> Tested-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Tested-by: Kamil Pokornicki <kamil.pokornicki@3mdeb.com> Tested-by: Przemyslaw Banasiak <przemyslaw.banasiak@3mdeb.com> Tested-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com> Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/68180 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--flashchips.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/flashchips.c b/flashchips.c
index 47a37ee3b..41e4c42c2 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6335,7 +6335,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2,
- .tested = TEST_OK_PREW,
+ .tested = TEST_OK_PREWB,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -6501,7 +6501,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2,
- .tested = TEST_OK_PREW,
+ .tested = TEST_OK_PREWB,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -6628,7 +6628,7 @@ const struct flashchip flashchips[] = {
/* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */
/* QPI: enable 0x38, disable 0xFF */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_WRSR2,
- .tested = TEST_OK_PREW,
+ .tested = TEST_OK_PREWB,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -6755,7 +6755,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN |
FEATURE_WRSR_EXT2 | FEATURE_WRSR2 | FEATURE_WRSR3,
- .tested = TEST_OK_PREW,
+ .tested = TEST_OK_PREWB,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -6811,7 +6811,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2,
- .tested = TEST_OK_PREW,
+ .tested = TEST_OK_PREWB,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -6933,7 +6933,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2,
- .tested = TEST_OK_PREW,
+ .tested = TEST_OK_PREWB,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -17359,7 +17359,7 @@ const struct flashchip flashchips[] = {
.total_size = 16384,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_WRSR2,
- .tested = TEST_OK_PREW,
+ .tested = TEST_OK_PREWB,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -18202,7 +18202,7 @@ const struct flashchip flashchips[] = {
/* supports SFDP */
/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR2,
- .tested = TEST_OK_PREW,
+ .tested = TEST_OK_PREWB,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
@@ -18344,7 +18344,7 @@ const struct flashchip flashchips[] = {
/* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */
/* QPI enable 0x38, disable 0xFF */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_WRSR2,
- .tested = TEST_OK_PREW,
+ .tested = TEST_OK_PREWB,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =