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author | Tyler Wang <tyler.wang@quanta.corp-partner.google.com> | 2023-12-12 20:13:43 +0800 |
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committer | Nikolai Artemiev <nartemiev@google.com> | 2024-01-05 03:55:57 +0000 |
commit | bb8e6f904b8297731ddd5f27e1270c00b155cd57 (patch) | |
tree | 9543c10bbf7bd8f2aad84643dec5c8429e8eed12 | |
parent | 6f3339fda6e976c1ed9ac0b499d0f48296625059 (diff) | |
download | flashrom-bb8e6f904b8297731ddd5f27e1270c00b155cd57.tar.gz flashrom-bb8e6f904b8297731ddd5f27e1270c00b155cd57.tar.bz2 flashrom-bb8e6f904b8297731ddd5f27e1270c00b155cd57.zip |
flashchips: Add write-protect support for GD25LQ255E
datasheet: https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20221129/DS-00562-GD25LQ255E-Rev1.1.pdf
BUG=b:311336475
TEST=Verified on karis
w/o this patch:
$ flashrom_tester --flashrom_binary ./flashrom internal Lock_top_quad
--> Failed
w/ this patch:
$ flashrom_tester --flashrom_binary ./flashrom internal Lock_top_quad
--> Pass
This lock_top_quad test did(copied from partial_lock_test()):
* Disable hardware WP so we can modify the protected range.
* Then enable software WP so the range is enforced and enable
hardware WP so that flashrom does not disable software WP during the
operation.
* Check that we cannot write to the protected region.
* Check that we can write to the non protected region.
Change-Id: I1425e931433c00caceaabc6037a79099d6d5eac5
Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/79460
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-by: Hsuan-ting Chen <roccochen@google.com>
-rw-r--r-- | flashchips.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c index 8c2fecdb1..663b01b20 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6557,7 +6557,7 @@ const struct flashchip flashchips[] = { .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_4BA, - .tested = TEST_OK_PREW, + .tested = TEST_OK_PREWB, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers = @@ -6593,6 +6593,16 @@ const struct flashchip flashchips[] = { .write = SPI_CHIP_WRITE256, .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1650, 2000}, + .reg_bits = + { + .srp = {STATUS1, 7, RW}, + .srl = {STATUS2, 0, RW}, + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}}, + .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */ + .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */ + .cmp = {STATUS2, 6, RW}, + }, + .decode_range = DECODE_RANGE_SPI25, }, { |