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authorDavide Gerhard <rainbow@irh.it>2022-11-14 08:05:03 +0100
committerAnastasia Klimchuk <aklm@chromium.org>2024-02-07 06:16:49 +0000
commitf08acc669bf6db2449fca1840aed5ff415de5172 (patch)
treef29aa77ac5155c63b095386f7cd337ed5cc6273b
parent04deed8c8f47f621db6b86d6770aa18755ffe3e2 (diff)
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flashchips: Add Macronix MX25R1635F
16Mbit (2MiB) [x1/x2/x4] Wide Voltage Range (VCC 1.65V-3.6V). It is similar to the already-supported MX25R3235F, but the total size is halved. Tested probe, read, erase, write and verify with buspirate. Datasheet: https://www.mxic.com.tw/Lists/Datasheet/Attachments/8702/MX25R1635F,%20Wide%20Range,%2016Mb,%20v1.6.pdf Change-Id: Idce301ed90d6742b56e928068d201e5c3a2e5aee Signed-off-by: Davide Gerhard <rainbow@irh.it> Reviewed-on: https://review.coreboot.org/c/flashrom/+/69678 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--flashchips.c39
-rw-r--r--include/flashchips.h1
2 files changed, 40 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c
index f580a362d..204f34ffb 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -10050,6 +10050,45 @@ const struct flashchip flashchips[] = {
{
.vendor = "Macronix",
+ .name = "MX25R1635F",
+ .bustype = BUS_SPI,
+ .manufacture_id = MACRONIX_ID,
+ .model_id = MACRONIX_MX25R1635F,
+ .total_size = 2048,
+ .page_size = 256,
+ /* OTP: 1024B total; enter 0xB1, exit 0xC1 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_OK_PREW,
+ .probe = PROBE_SPI_RDID,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 512} },
+ .block_erase = SPI_BLOCK_ERASE_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 64} },
+ .block_erase = SPI_BLOCK_ERASE_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 32} },
+ .block_erase = SPI_BLOCK_ERASE_D8,
+ }, {
+ .eraseblocks = { {2 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_60,
+ }, {
+ .eraseblocks = { {2 * 1024 * 1024, 1} },
+ .block_erase = SPI_BLOCK_ERASE_C7,
+ }
+ },
+ .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD, /* bit 6 is quad enable */
+ .unlock = SPI_DISABLE_BLOCKPROTECT_BP3_SRWD,
+ .write = SPI_CHIP_WRITE256,
+ .read = SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {1650, 3600},
+ },
+
+ {
+ .vendor = "Macronix",
.name = "MX25R3235F",
.bustype = BUS_SPI,
.manufacture_id = MACRONIX_ID,
diff --git a/include/flashchips.h b/include/flashchips.h
index d676cda4a..d0a858b1f 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -537,6 +537,7 @@
#define MACRONIX_MX25L3255E 0x9e16
#define MACRONIX_MX77L25650F 0x7519
+#define MACRONIX_MX25R1635F 0x2815
#define MACRONIX_MX25R3235F 0x2816
#define MACRONIX_MX25R6435F 0x2817