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author | Ed Swierk <eswierk@skyportsystems.com> | 2017-07-03 13:33:44 -0700 |
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committer | Nico Huber <nico.h@gmx.de> | 2017-10-15 12:37:34 +0000 |
commit | 199ab391145497645967b7629c0f74b1bdd2d46d (patch) | |
tree | 0a6c99ad32fd78d48c62037068151cf86a0d4eb7 | |
parent | cc20a9b08e849437a58402f4a64d63d3710684af (diff) | |
download | flashrom-199ab391145497645967b7629c0f74b1bdd2d46d.tar.gz flashrom-199ab391145497645967b7629c0f74b1bdd2d46d.tar.bz2 flashrom-199ab391145497645967b7629c0f74b1bdd2d46d.zip |
4BA: Add Micron N25Q/MT25QL 32MB and 64MB 3V SPI flash
Use direct 4-byte address commands.
Change-Id: I3c130c5ecf4bcc7cf3b34257cb5fc3df523ce08b
Signed-off-by: Ed Swierk <eswierk@skyportsystems.com>
Reviewed-on: https://review.coreboot.org/20511
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | flashchips.c | 78 |
1 files changed, 78 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c index e5cf8a4ae..742cc6eee 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9743,6 +9743,84 @@ const struct flashchip flashchips[] = { }, { + .vendor = "Micron", + .name = "N25Q256..3E/MT25QL256", /* ..3E/L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q256__3E, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .four_bytes_addr_funcs = + { + .read_nbyte = spi_nbyte_read_4ba_direct, + .program_byte = spi_byte_program_4ba_direct, + .program_nbyte = spi_nbyte_program_4ba_direct + }, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_21_4ba_direct, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_dc_4ba_direct, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron", + .name = "N25Q512..3E/MT25QL512", /* ..3E/L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q512__3E, + .total_size = 65536, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .four_bytes_addr_funcs = + { + .read_nbyte = spi_nbyte_read_4ba_direct, + .program_byte = spi_byte_program_4ba_direct, + .program_nbyte = spi_nbyte_program_4ba_direct + }, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_21_4ba_direct, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_dc_4ba_direct, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { .vendor = "MoselVitelic", .name = "V29C51000B", .bustype = BUS_PARALLEL, |