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| author | Nico Huber <nico.huber@secunet.com> | 2017-08-31 16:14:22 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-11-05 22:33:41 +0000 |
| commit | 22f2dc5ec0b13a413a9ce42a5836ec2aa3b1abfc (patch) | |
| tree | 9b496559cd9503628b42f19c5789400e0bcc5373 | |
| parent | 1f081530b60ee805532f106f59cc33973e160481 (diff) | |
| download | flashrom-22f2dc5ec0b13a413a9ce42a5836ec2aa3b1abfc.tar.gz flashrom-22f2dc5ec0b13a413a9ce42a5836ec2aa3b1abfc.tar.bz2 flashrom-22f2dc5ec0b13a413a9ce42a5836ec2aa3b1abfc.zip | |
ichspi: Disable software sequencing by default for Skylake
Skylake is a mess, especially with coreboot. We have now a present and
configured software sequencing interface with SCGO supposedly being
readonly (Apollo Lake has that feature and a strap documented, Skylake
behaviour might be the same). As we can't easily check if it's read-
only, just enable hardware sequencing by default (even if the software
sequencing interface seems usable).
Change-Id: I8a13fb9c3ca679b3f7d39ad1dc56d5efdc80045b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/22274
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
| -rw-r--r-- | ichspi.c | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -1951,6 +1951,11 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) ich_spi_mode = ich_hwseq; } + if (ich_spi_mode == ich_auto && ich_gen == CHIPSET_100_SERIES_SUNRISE_POINT) { + msg_pdbg("Enabling hardware sequencing by default for 100 series PCH.\n"); + ich_spi_mode = ich_hwseq; + } + if (ich_spi_mode == ich_hwseq) { if (!desc_valid) { msg_perr("Hardware sequencing was requested " |