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| author | Ed Swierk <eswierk@aristanetworks.com> | 2008-10-29 14:54:36 +0000 |
|---|---|---|
| committer | Ed Swierk <eswierk@arastra.com> | 2008-10-29 14:54:36 +0000 |
| commit | b759db2cb510c3dc0a33bfdf8d9f757de500c664 (patch) | |
| tree | e21d91b2aff114a28b59fa57ae2e74495ae3f645 | |
| parent | 2bc9f377597bde4c612db4a3ac97cd552c346ad0 (diff) | |
| download | flashrom-b759db2cb510c3dc0a33bfdf8d9f757de500c664.tar.gz flashrom-b759db2cb510c3dc0a33bfdf8d9f757de500c664.tar.bz2 flashrom-b759db2cb510c3dc0a33bfdf8d9f757de500c664.zip | |
Enable SPI boot flash support on EP80579, which has the ICH7 register set
Corresponding to flashrom svn r332 and coreboot v2 svn r3706.
Signed-off-by: Ed Swierk <eswierk@aristanetworks.com>
Acked-by: Ed Swierk <eswierk@aristanetworks.com>
| -rw-r--r-- | chipset_enable.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 87b238045..d7a5b024c 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -767,7 +767,7 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x5031, "Intel EP80579", enable_flash_ich_dc}, + {0x8086, 0x5031, "Intel EP80579", enable_flash_ich7}, {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich7}, {0x8086, 0x27b8, "Intel ICH7/ICH7R", enable_flash_ich7}, {0x8086, 0x27b9, "Intel ICH7M", enable_flash_ich7}, |