Add a bunch of new/tested stuff and various small changes 19

Tested mainboards:
OK:
 - ASUS P8H77-V LE
   http://www.flashrom.org/pipermail/flashrom/2013-June/011127.html
 - HP Pegatron IPMEL-AE (Evans-GL6)
   Reported by Idwer on IRC
 - MSI MS-7379 (G31M)
   http://paste.flashrom.org/view.php?id=1726
 - MSI MS-7816 (H87-G43)
   http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html
 - MSI MS-9830 (IM-945GSE-A, A9830IMS)
   http://paste.flashrom.org/view.php?id=1730
 - Supermicro X8SAX
   http://paste.flashrom.org/view.php?id=1717
NOT OK:
 - Intel D2700MUD
   http://paste.flashrom.org/view.php?id=1723
 - Intel DQ45CB
   http://www.flashrom.org/pipermail/flashrom/2013-August/011369.html

Chipsets:
 - Add PCI ID for Intel's Coleto Creek.
 - Mark Intel H87 (0x8c4a) as OK.
   http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html

Miscellaneous:
 - ichspi: Fix printing address ranges if space is divided by FPB.
 - Tiny other stuff.

Corresponding to flashrom svn r1709.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

5 files changed, 16 insertions, 6 deletions

diff --git a/board_enable.c b/board_enable.c
index d3460c1f4..074cabb89 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -2235,6 +2235,7 @@ static int it8718f_gpio63_raise(void)
  * Suited for all boards with ambiguous DMI chassis information, which should be
  * whitelisted because they are known to work:
  * - ASRock IMB-A180(-H)
+ * - Intel D945GCNL
  * - MSC Q7 Tunnel Creek Module (Q7-TCTC)
  */
 static int p2_not_a_laptop(void)
diff --git a/chipset_enable.c b/chipset_enable.c
index 2706be4aa..a2df263c7 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1440,6 +1440,7 @@ const struct penable chipset_enables[] = {
 	{0x8086, 0x1e5e, NT, "Intel", "HM70",		enable_flash_pch7},
 	{0x8086, 0x1e5f, NT, "Intel", "NM70",		enable_flash_pch7},
 	{0x8086, 0x2310, NT, "Intel", "DH89xxCC",	enable_flash_pch7},
+	{0x8086, 0x2390, NT, "Intel", "Coleto Creek",	enable_flash_pch7},
 	{0x8086, 0x2410, OK, "Intel", "ICH",		enable_flash_ich_4e},
 	{0x8086, 0x2420, OK, "Intel", "ICH0",		enable_flash_ich_4e},
 	{0x8086, 0x2440, OK, "Intel", "ICH2",		enable_flash_ich_4e},
@@ -1511,7 +1512,7 @@ const struct penable chipset_enables[] = {
 	{0x8086, 0x8c47, NT, "Intel", "Lynx Point",	enable_flash_pch8},
 	{0x8086, 0x8c48, NT, "Intel", "Lynx Point",	enable_flash_pch8},
 	{0x8086, 0x8c49, NT, "Intel", "HM86",		enable_flash_pch8},
-	{0x8086, 0x8c4a, NT, "Intel", "H87",		enable_flash_pch8},
+	{0x8086, 0x8c4a, OK, "Intel", "H87",		enable_flash_pch8},
 	{0x8086, 0x8c4b, NT, "Intel", "HM87",		enable_flash_pch8},
 	{0x8086, 0x8c4c, NT, "Intel", "Q85",		enable_flash_pch8},
 	{0x8086, 0x8c4d, NT, "Intel", "Lynx Point",	enable_flash_pch8},
diff --git a/ichspi.c b/ichspi.c
index 4f6a1b1ad..6d1bd1a52 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1210,7 +1210,7 @@ static int ich_hwseq_probe(struct flashctx *flash)
 	} else {
 		msg_cdbg("The flash address space (0x%06x - 0x%06x) is divided "
 			 "at address 0x%06x in two partitions.\n",
-			 0, size_high-1, boundary);
+			 0, total_size-1, boundary);
 		size_low = total_size - size_high;
 		erase_size_low = ich_hwseq_get_erase_block_size(0);
 
@@ -1224,7 +1224,7 @@ static int ich_hwseq_probe(struct flashctx *flash)
 		eraser->eraseblocks[1].size = erase_size_high;
 		eraser->eraseblocks[1].count = size_high / erase_size_high;
 		msg_cdbg("The second partition ranges from 0x%06x to 0x%06x.\n",
-			 boundary, size_high-1);
+			 boundary, total_size-1);
 		msg_cdbg("In that range are %d erase blocks with %d B each.\n",
 			 size_high / erase_size_high, erase_size_high);
 	}
diff --git a/print.c b/print.c
index 0d209c120..6766eeb92 100644
--- a/print.c
+++ b/print.c
@@ -720,6 +720,7 @@ const struct board_info boards_known[] = {
 	B("ASUS",	"P8H67-M PRO",		BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8H77-I",		OK, "http://www.asus.com/Motherboards/P8H77I/", NULL),
 	B("ASUS",	"P8H77-M",		OK, "http://www.asus.com/Motherboards/P8H77M/", NULL),
+	B("ASUS",	"P8H77-V LE",		OK, "http://www.asus.com/Motherboards/P8H77V_LE/", NULL),
 	B("ASUS",	"P8P67 (rev. 3.1)",	BAD, NULL, "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("ASUS",	"P8P67 LE (B2)",	OK, NULL, NULL),
 	B("ASUS",	"P8P67 LE (B3)",	BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
@@ -850,6 +851,7 @@ const struct board_info boards_known[] = {
 	B("GIGABYTE",	"GA-Z77MX-D3H",		BAD, "http://www.gigabyte.com/products/product-page.aspx?pid=4145", "Uses MX25L6436E and requires a small patch (but works flawlessly with that)."),
 	B("HP",		"8100 Elite CMT PC (304Bh)", BAD, NULL, "SPI lock down, PR, read-only descriptor, locked ME region."),
 	B("HP",		"e-Vectra P2706T",	OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Home.jsp?lang=en&cc=us&prodSeriesId=77515&prodTypeId=12454", NULL),
+	B("HP",		"Evans-GL6 (Pegatron IPMEL-AE)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?cc=us&lc=en&dlc=en&docname=c01925513", "Found in HP Pavilion Slimline s5220f."),
 	B("HP",		"ProLiant DL145 G3",	OK, "http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?objectID=c00816835&lang=en&cc=us&taskId=101&prodSeriesId=3219755&prodTypeId=15351", NULL),
 	B("HP",		"ProLiant DL165 G6",	OK, "http://h10010.www1.hp.com/wwpc/us/en/sm/WF05a/15351-15351-3328412-241644-3328421-3955644.html", NULL),
 	B("HP",		"ProLiant N40L",	OK, NULL, NULL),
@@ -866,6 +868,7 @@ const struct board_info boards_known[] = {
 	B("IBM",	"x3455",		OK, "http://www-03.ibm.com/systems/x/hardware/rack/x3455/index.html", NULL),
 	B("IEI",	"PICOe-9452",		OK, "http://www.ieiworld.com/product_groups/industrial/content.aspx?keyword=WSB&gid=00001000010000000001&cid=08125380291060861658&id=08142308605814597144", NULL),
 	B("Intel",	"D201GLY",		OK, "http://www.intel.com/support/motherboards/desktop/d201gly/index.htm", NULL),
+	B("Intel",	"D2700MUD",		BAD, "http://www.intel.com/cd/products/services/emea/eng/motherboards/desktop/D2700MUD/", "SMM protection enabled"),
 	B("Intel",	"D425KT",		BAD, "http://www.intel.com/content/www/us/en/motherboards/desktop-motherboards/desktop-board-d425kt.html", "NM10 with SPI lock down, BIOS lock, see http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html"),
 	B("Intel",	"D865GLC",		BAD, NULL, "ICH5 with BIOS lock enable, see http://paste.flashrom.org/view.php?id=775"),
 	B("Intel",	"D945GCNL",		OK, NULL, NULL),
@@ -876,6 +879,7 @@ const struct board_info boards_known[] = {
 	B("Intel",	"DH67CF",		BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2011-September/007789.html"),
 	B("Intel",	"DH67CL",		BAD, NULL, "H67 with BIOS lock enable and locked ME region, see http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html"),
 	B("Intel",	"DN2800MT (Marshalltown)", BAD, NULL, "BIOS locked via BIOS_CNTL."),
+	B("Intel",	"DQ45CB",		BAD, NULL, "Probing works (Winbond W25Q32, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("Intel",	"DQ77MK",		BAD, NULL, "Q77 with BIOS lock enable and locked ME region, see http://paste.flashrom.org/view.php?id=1603"),
 	B("Intel",	"EP80759",		OK, NULL, NULL),
 	B("Intel",	"Foxhollow",		OK, NULL, "Intel reference board."),
@@ -927,8 +931,9 @@ const struct board_info boards_known[] = {
 	B("MSI",	"MS-7368 (K9AG Neo2-Digital)", OK, "http://www.msi.com/product/mb/K9AG-Neo2-Digital.html", NULL),
 	B("MSI",	"MS-7369 (K9N Neo V2)", OK, "http://www.msi.com/product/mb/K9N-Neo-V2.html", NULL),
 	B("MSI",	"MS-7376 (K9A2 Platinum V1)", OK, "http://www.msi.com/product/mb/K9A2-Platinum.html", NULL),
+	B("MSI",	"MS-7379 (G31M)",	OK, "http://www.msi.com/product/mb/G31M.html", NULL),
 	B("MSI",	"MS-7529 (G31M3-L(S) V2)", OK, "http://www.msi.com/product/mb/G31M3-L-V2---G31M3-LS-V2.html", NULL),
-	B("MSI",	"MS-7529 (G31TM-P21)",  OK, "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
+	B("MSI",	"MS-7529 (G31TM-P21)",	OK, "http://www.msi.com/product/mb/G31TM-P21.html", NULL),
 	B("MSI",	"MS-7548 (Aspen-GL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c01635688&lc=en&cc=us&dlc=en", NULL),
 	B("MSI",	"MS-7551 (KA780G)",	OK, "http://www.msi.com/product/mb/KA780G.html", NULL),
 	B("MSI",	"MS-7596 (785GM-E51)",  OK, "http://www.msi.com/product/mb/785GM-E51.html", NULL),
@@ -945,6 +950,8 @@ const struct board_info boards_known[] = {
 	B("MSI",	"MS-7740 (H61MA-E35(B3))", OK, "http://www.msi.com/product/mb/H61MA-E35--B3-.html", NULL),
 	B("MSI",	"MS-7756 (H77MA-G43)",	OK, "http://www.msi.com/product/mb/H77MA-G43.html", NULL),
 	B("MSI",	"MS-7808 (B75MA-E33)",	OK, "http://www.msi.com/product/mb/B75MA-E33.html", NULL),
+	B("MSI",	"MS-7816 (H87-G43)",	OK, "http://www.msi.com/product/mb/H87-G43.html", NULL),
+	B("MSI",	"MS-9830 (IM-945GSE-A, A9830IMS)", OK, "http://www.msi.com/product/ipc/IM-945GSE-A.html", NULL),
 	B("NEC",	"PowerMate 2000",	OK, "http://support.necam.com/mobilesolutions/hardware/Desktops/pm2000/celeron/", NULL),
 	B("Nokia",	"IP530",		OK, NULL, NULL),
 	B("Palit",	"N61S",			OK, NULL, NULL),
@@ -993,6 +1000,7 @@ const struct board_info boards_known[] = {
 	B("Supermicro",	"X8DTT-HIBQF",		OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTT-H.cfm", NULL),
 	B("Supermicro",	"X8DTU-6TF+",		BAD, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU_.cfm?TYP=SAS&LAN=10", "Probing works (Atmel AT25DF321A, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("Supermicro",	"X8DTU-F",		OK, "http://www.supermicro.com/products/motherboard/QPI/5500/X8DTU-F.cfm", NULL),
+	B("Supermicro",	"X8SAX",		OK, "http://www.supermicro.com/products/motherboard/xeon3000/x58/x8sax.cfm", NULL),
 	B("Supermicro",	"X8SIE(-F)",		BAD, "http://www.supermicro.com/products/motherboard/Xeon3000/3400/X8SIE.cfm?IPMI=N&TYP=LN2", "Requires unlocking the ME although the registers are set up correctly by the descriptor/BIOS already (tested with swseq and hwseq)."),
 	B("Supermicro",	"X8STi",		OK, "http://www.supermicro.com/products/motherboard/Xeon3000/X58/X8STi.cfm", NULL),
 	B("Supermicro",	"X9DR3-F",		BAD, "http://www.supermicro.com/products/motherboard/xeon/c600/x9dr3-f.cfm", "Probing works (Numonyx N25Q128 (supported by SFDP only atm), 16384 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
@@ -1073,7 +1081,7 @@ const struct board_info laptops_known[] = {
 	B("Acer",	"Aspire 1520",		OK, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml", NULL),
 	B("Acer",	"Aspire One",		BAD, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
 	B("ASUS",	"A8Jm",			OK, NULL, NULL),
-	B("ASUS",	"Eee PC 701 4G",	BAD, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40VSIG) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
+	B("ASUS",	"Eee PC 701 4G",	BAD, "http://www.asus.com/Eee/Eee_PC/Eee_PC_4G/", "It seems the chip (25X40) is behind some SPI flash translation layer (likely in the EC, the ENE KB3310)."),
 	B("ASUS",	"M6Ne",			NT, "http://www.asus.com/Notebooks/Versatile_Performance/M6NNe/", "Untested board enable."),
 	B("Clevo",	"P150HM",		BAD, "http://www.clevo.com.tw/en/products/prodinfo_2.asp?productid=307", "Probing works (Macronix MX25L3205, 4096 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."),
 	B("Dell",	"Inspiron 1420",	OK, NULL, NULL),
diff --git a/programmer.h b/programmer.h
index f03eac316..4db8d58ff 100644
--- a/programmer.h
+++ b/programmer.h
@@ -572,7 +572,7 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
 		 enum ich_chipset ich_generation);
 int via_init_spi(struct pci_dev *dev, uint32_t mmio_base);
 
-/* imc.c */
+/* amd_imc.c */
 int amd_imc_shutdown(struct pci_dev *dev);
 
 /* it85spi.c */