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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-05-15 23:36:23 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-05-15 23:36:23 +0000 |
commit | 9862251f8985237445de98060b2fb319c2d6d519 (patch) | |
tree | b253ee8311853b77696f55bccbfd7a6b47ca6f81 | |
parent | 515ab3de05f81253b94e7dd659f09c50724fb830 (diff) | |
download | flashrom-9862251f8985237445de98060b2fb319c2d6d519.tar.gz flashrom-9862251f8985237445de98060b2fb319c2d6d519.tar.bz2 flashrom-9862251f8985237445de98060b2fb319c2d6d519.zip |
Uwe tested the recent SB600 SPI commit and notified me of one unexpected problem
It seems some boards do not use SPI_HOLD at all. Take that into account
when trying to figure out if SPI is available.
Print the SB600 ROM strap override register status for better debugging.
Corresponding to flashrom svn r516.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
-rw-r--r-- | chipset_enable.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index dff5d402f..220982f7f 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -719,7 +719,8 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name) reg &= 0xC0; printf_debug("GPIO31 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_HOLD"); printf_debug("GPIO32 used for %s\n", (reg & (1 << 7)) ? "GPIO" : "SPI_CS"); - if (reg != 0x00) + /* SPI_HOLD is not used on all boards, filter it out. */ + if ((reg & 0x80) != 0x00) has_spi = 0; /* GPIO47/SPI_CLK status */ reg = pci_read_byte(smbus_dev, 0xA7); @@ -732,6 +733,29 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name) if (has_spi) flashbus = BUS_TYPE_SB600_SPI; + /* Read ROM strap override register. */ + OUTB(0x8f, 0xcd6); + reg = INB(0xcd7); + reg &= 0x0e; + printf_debug("ROM strap override is %sactive", (reg & 0x02) ? "" : "not "); + if (reg & 0x02) { + switch ((reg & 0x0c) >> 2) { + case 0x00: + printf_debug(": LPC"); + break; + case 0x01: + printf_debug(": PCI"); + break; + case 0x02: + printf_debug(": FWH"); + break; + case 0x03: + printf_debug(": SPI"); + break; + } + } + printf_debug("\n"); + /* Force enable SPI ROM in SB600 PM register. * If we enable SPI ROM here, we have to disable it after we leave. * But how can we know which ROM we are going to handle? So we have |