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authorEvgeny Zinoviev <me@ch1p.com>2019-06-02 23:07:52 +0300
committerNico Huber <nico.h@gmx.de>2019-06-03 20:21:58 +0000
commit17890b37f362e551e886506f39e7bf7181419457 (patch)
tree9278586896099d40869319f64cd3124e1c4f902a
parentf9632d82634bbbdc7e90357d3ea7c4a631ab4376 (diff)
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chipset_enable: Mark Intel QS77 as DEP
Tested reading and writing with `-p internal` on MacBook Air 5,2 with Intel QS77. Change-Id: I508b6379507c2881c976d6baf7348b1161449cfe Signed-off-by: Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33164 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
-rw-r--r--chipset_enable.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index 6280876bc..19fd65895 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1746,7 +1746,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0x1e4a, DEP, "Intel", "H77", enable_flash_pch7},
{0x8086, 0x1e53, NT, "Intel", "C216", enable_flash_pch7},
{0x8086, 0x1e55, DEP, "Intel", "QM77", enable_flash_pch7},
- {0x8086, 0x1e56, NT, "Intel", "QS77", enable_flash_pch7},
+ {0x8086, 0x1e56, DEP, "Intel", "QS77", enable_flash_pch7},
{0x8086, 0x1e57, DEP, "Intel", "HM77", enable_flash_pch7},
{0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7},
{0x8086, 0x1e59, NT, "Intel", "HM76", enable_flash_pch7},