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| author | Jan Samek <jan.samek@siemens.com> | 2020-01-08 12:35:14 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-10 15:12:12 +0000 |
| commit | 62027c8e3733f891637fa9c4415af61f997e326c (patch) | |
| tree | 5838c4f7d83617681f65d25bb6e051e09290c87e | |
| parent | 174a0c1b405281158d32b457e5652cc961260549 (diff) | |
| download | flashrom-62027c8e3733f891637fa9c4415af61f997e326c.tar.gz flashrom-62027c8e3733f891637fa9c4415af61f997e326c.tar.bz2 flashrom-62027c8e3733f891637fa9c4415af61f997e326c.zip | |
chipset_enable: add PCI ID for APL-I (Broxton)
Change-Id: I48dba541b5893551f47f3d5ed422eb1dc36f5324
Signed-off-by: Jan Samek <jan.samek@siemens.com>
Signed-off-by: Henning Schild <henning.schild@siemens.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/42805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| -rw-r--r-- | chipset_enable.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 632679c20..d56a5470b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2052,6 +2052,7 @@ const struct penable chipset_enables[] = { {0x8086, 0xa2c9, B_S, NT, "Intel", "Z370", enable_flash_pch100}, {0x8086, 0xa2d2, B_S, NT, "Intel", "X299", enable_flash_pch100}, {0x8086, 0x5ae8, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, + {0x8086, 0x5af0, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, {0x8086, 0xa303, B_S, NT, "Intel", "H310", enable_flash_pch300}, {0x8086, 0xa304, B_S, NT, "Intel", "H370", enable_flash_pch300}, {0x8086, 0xa305, B_S, NT, "Intel", "Z390", enable_flash_pch300}, |