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authorNikolai Artemiev <nartemiev@google.com>2021-03-23 17:10:45 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2021-03-24 03:11:16 +0000
commit64eb987690251af110ac44310004e0ac9ebd5c30 (patch)
treefc0f3660340f85f572d76a71007759729cd6ce2a
parentf439b009345bb102d5d43b5b4b6a78a569ac6338 (diff)
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flashchips.c: mark EN25S64 as TESTED_OK_PREW
The chip was marked as TESTED_OK_PREW in the cros tree by `commit b2f900273aac329b82089e4dbc5a8ba3d032fff0`. Quoting from the original commit message: > TEST=read and write BIOS on glimmer with Eon device. Change-Id: I13dc3e6bde9e4581fdd5856a412918784b913fbc Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51734 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--flashchips.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c
index d47871db9..1e0c489dd 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -5441,7 +5441,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 512B total; enter 0x3A */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
- .tested = TEST_UNTESTED,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =