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authorNikolai Artemiev <nartemiev@google.com>2021-03-23 17:21:10 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2021-03-24 03:12:37 +0000
commit6d79a6ab808463f6895a9665858ff8b220d5118b (patch)
tree3d6c62ca8f46a33f642e23a4801ef09a0241a5b5
parent1fb4050faf8465ffc6a0259ef427c20818a80907 (diff)
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flashchips.c: mark MX25U25635F as TESTED_OK_PREW
The chip was marked as TESTED_OK_PREW in the cros tree by `commit 419e32ae457cc36b03757b89471a7ce3770e9611`. Quoting from the original commit message: > TEST=Tested writes using Servo Change-Id: Id7f44a41d6b2c397f1ce2e345f8ab44e95e4cfa2 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51736 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--flashchips.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c
index 2f8751587..5b328f8ab 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -9326,7 +9326,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 512B total; enter 0xB1, exit 0xC1 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_4BA,
- .tested = TEST_OK_PR,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =