summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAlan Green <avg@google.com>2019-07-24 13:56:06 +1000
committerNico Huber <nico.h@gmx.de>2019-08-03 14:46:24 +0000
commit8855257d2051b2db0f6b1a4125d39f075d360cc4 (patch)
tree3968368edfdf80bc3b8be45714492d29654e2a88
parenta508ca0acdc5cbd0ae8c2342d865d363ef24f185 (diff)
downloadflashrom-8855257d2051b2db0f6b1a4125d39f075d360cc4.tar.gz
flashrom-8855257d2051b2db0f6b1a4125d39f075d360cc4.tar.bz2
flashrom-8855257d2051b2db0f6b1a4125d39f075d360cc4.zip
flashchips.c: Mark Intel 82802AB as TEST_OK_PREW
Intel 82802AB Was marked as TEST_OK_PREW in the Chromium fork in their SHA312d9ff1fb1ccb5533a867d4248eb1be95ec3fbc. The definitions in the fork and here in upstream are otherwise substantially similar. There are no other downstream changes for Intel chips to be upstreamed. Signed-off-by: Alan Green <avg@google.com> Change-Id: Iec75f0b1c35000308601fa6fdd63ab1738d0ef94 Reviewed-on: https://review.coreboot.org/c/flashrom/+/34533 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-rw-r--r--flashchips.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c
index 166af6a58..b859bf638 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7671,7 +7671,7 @@ const struct flashchip flashchips[] = {
.total_size = 512,
.page_size = 64 * 1024,
.feature_bits = FEATURE_REGISTERMAP,
- .tested = TEST_OK_PR,
+ .tested = TEST_OK_PREW,
.probe = probe_82802ab,
.probe_timing = TIMING_IGNORED, /* routine does not use probe_timing (82802ab.c) */
.block_erasers =