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authorPatrick Georgi <pgeorgi@google.com>2020-05-02 16:07:11 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-05 13:06:17 +0000
commit8bbb764818f8ebf71bd14bd6ff90ad233646cc3b (patch)
tree907e51e094d3428ddacb0af2a0de5541777dda6b
parent757e89243efd7e783923d486c542a692072e0111 (diff)
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spi95: Check for success before using send_command's returned data
If the transfer failed, the data might be invalid. Change-Id: I3ad9daa00a54e2a3954983cec91b6685f1a98880 Found-By: Coverity Scan #1405870 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40970 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--spi95.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/spi95.c b/spi95.c
index ecb2c1dbc..976f99a11 100644
--- a/spi95.c
+++ b/spi95.c
@@ -33,12 +33,15 @@ int probe_spi_st95(struct flashctx *flash)
static const unsigned char cmd[ST_M95_RDID_OUTSIZE_MAX] = { ST_M95_RDID };
unsigned char readarr[ST_M95_RDID_INSIZE];
uint32_t id1, id2;
+ int ret;
uint32_t rdid_outsize = ST_M95_RDID_2BA_OUTSIZE; // 16 bit address
if (flash->chip->total_size * KiB > 64 * KiB)
rdid_outsize = ST_M95_RDID_3BA_OUTSIZE; // 24 bit address
- spi_send_command(flash, rdid_outsize, sizeof(readarr), cmd, readarr);
+ ret = spi_send_command(flash, rdid_outsize, sizeof(readarr), cmd, readarr);
+ if (ret)
+ return ret;
id1 = readarr[0]; // manufacture id
id2 = (readarr[1] << 8) | readarr[2]; // SPI family code + model id