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authorNikolai Artemiev <nartemiev@google.com>2020-10-06 15:36:29 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2020-12-03 12:32:05 +0000
commit8fa792fb1f4e71d7cf128a67ce449b5e28c8407a (patch)
tree5e2fab4e5012405e58befbd30256d420fb883184
parentadbae0e2681a994520ea551bd2f66b06de0b0899 (diff)
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flashchips.c: add Spansion chips
Adds support for the following chips: - S25FL128S - S25FL129P - S25FL256S - S25FS128S - {F,S,V}29C51001B Chips imported from cros flashrom at `9c4c9a56b6a0370b383df9c75d71b3bd469e672d`. BUG=b:153800073 TEST=builds Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Change-Id: If6b23ad2e65258143e0045133828d9db119fb665 Reviewed-on: https://review.coreboot.org/c/flashrom/+/46064 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--flashchips.c180
-rw-r--r--flashchips.h9
2 files changed, 189 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c
index c4ba4c680..bc5de4afd 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -16124,6 +16124,68 @@ const struct flashchip flashchips[] = {
{
.vendor = "Spansion",
+ .name = "S25FL128S_UL Uniform 128 kB Sectors",
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128S_UL,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_big_spansion,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {128 * 1024, 128} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1700, 2000},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL128S_US Uniform 64 kB Sectors",
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL128S_US,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_big_spansion,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1700, 2000},
+ },
+
+ {
+ .vendor = "Spansion",
.name = "S25FL129P......0", /* hybrid: 32 (top or bottom) 4 kB sub-sectors + 64 kB sectors */
.bustype = BUS_SPI,
.manufacture_id = SPANSION_ID,
@@ -16348,6 +16410,62 @@ const struct flashchip flashchips[] = {
{
.vendor = "Spansion",
+ .name = "S25FL256S Large Sectors",
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL256S_UL,
+ .total_size = 16384, /* This is just half the size.... */
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_big_spansion,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {256 * 1024, 64} },
+ .block_erase = s25fl_block_erase,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ },
+ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1700, 2000},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FL256S Small Sectors",
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FL256S_US,
+ .total_size = 16384, /* This is just half the size.... */
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_big_spansion,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = s25fl_block_erase,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ },
+ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1700, 2000},
+ },
+
+ {
+ .vendor = "Spansion",
.name = "S25FL256S......0", /* hybrid: 32 (top or bottom) 4 kB sub-sectors + 64 kB sectors */
.bustype = BUS_SPI,
.manufacture_id = SPANSION_ID,
@@ -16426,6 +16544,68 @@ const struct flashchip flashchips[] = {
},
{
+ .vendor = "Spansion",
+ .name = "S25FS128S Large Sectors",
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FS128S_L,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_big_spansion,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = s25fs_block_erase_d8,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1700, 2000},
+ },
+
+ {
+ .vendor = "Spansion",
+ .name = "S25FS128S Small Sectors",
+ .bustype = BUS_SPI,
+ .manufacture_id = SPANSION_ID,
+ .model_id = SPANSION_S25FS128S_S,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN,
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_big_spansion,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = s25fs_block_erase_d8,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ },
+ },
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1700, 2000},
+ },
+
+ {
.vendor = "SyncMOS/MoselVitelic",
.name = "{F,S,V}29C51001B",
.bustype = BUS_PARALLEL,
diff --git a/flashchips.h b/flashchips.h
index e9c043289..394eb30d2 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -662,8 +662,17 @@
#define SPANSION_S25FL204 0x4013
#define SPANSION_S25FL208 0x4014
#define SPANSION_S25FL216 0x4015 /* Same as S25FL216K, but the latter supports OTP, 3 status regs, quad I/O, SFDP etc. */
+#define SPANSION_S25FL116K 0x4015
#define SPANSION_S25FL132K 0x4016
#define SPANSION_S25FL164K 0x4017
+#define SPANSION_S25FS128S_L 0x20180081 /* Large sectors. */
+#define SPANSION_S25FS128S_S 0x20180181 /* Small sectors. */
+#define SPANSION_S25FS256S_L 0x02190081 /* Large sectors. */
+#define SPANSION_S25FS256S_S 0x02190181 /* Small sectors. */
+#define SPANSION_S25FL128S_UL 0x20180080 /* Uniform Large (128kB) sectors */
+#define SPANSION_S25FL128S_US 0x20180180 /* Uniform Small (64kB) sectors */
+#define SPANSION_S25FL256S_UL 0x02190080 /* Uniform Large (128kB) sectors */
+#define SPANSION_S25FL256S_US 0x02190180 /* Uniform Small (64kB) sectors */
/* Spansion 29GL families got a suffix indicating the process technology but share the same 3-Byte IDs. They can
* however be differentiated by CFI byte 45h. Some versions exist which have special top or bottom boot sectors