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authorAngel Pons <th3fanbus@gmail.com>2019-10-06 21:07:44 +0200
committerNico Huber <nico.h@gmx.de>2019-10-08 09:59:22 +0000
commitd58128eb83e59e09113666c80da81c891d76e949 (patch)
tree8ef79ded03a5d02eac66c0dde923a24fcd8408b2
parent9e2dc2fc818cc9c1b46924e103ce669ad154b7ab (diff)
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chipset_enable.c: Mark Intel Q75 as DEP
Tested reading, writing and erasing the internal flash chip using an HP Pro 6300 SFF mainboard with an Intel Q75 PCH. However, since ME-enabled chipsets are marked as DEP instead of OK, this one shall also be. Change-Id: I273af0eb33e74b31bc4fdc95362527bba080c5a0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/35826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
-rw-r--r--chipset_enable.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index f02ba87e6..b55852ca2 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1823,7 +1823,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0x1e44, B_FS, DEP, "Intel", "Z77", enable_flash_pch7},
{0x8086, 0x1e46, B_FS, NT, "Intel", "Z75", enable_flash_pch7},
{0x8086, 0x1e47, B_FS, NT, "Intel", "Q77", enable_flash_pch7},
- {0x8086, 0x1e48, B_FS, NT, "Intel", "Q75", enable_flash_pch7},
+ {0x8086, 0x1e48, B_FS, DEP, "Intel", "Q75", enable_flash_pch7},
{0x8086, 0x1e49, B_FS, DEP, "Intel", "B75", enable_flash_pch7},
{0x8086, 0x1e4a, B_FS, DEP, "Intel", "H77", enable_flash_pch7},
{0x8086, 0x1e53, B_FS, NT, "Intel", "C216", enable_flash_pch7},