summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorShiyu Sun <sshiyu@google.com>2020-12-21 17:20:56 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2020-12-29 07:35:04 +0000
commitef42b5edb346a8daaf9e732f9f8c317d763e48ac (patch)
treecc0e800744ea68474f721cbf8cedba38ba573f23
parent5ab46567df4bcc470db769d584683e67d784084e (diff)
downloadflashrom-ef42b5edb346a8daaf9e732f9f8c317d763e48ac.tar.gz
flashrom-ef42b5edb346a8daaf9e732f9f8c317d763e48ac.tar.bz2
flashrom-ef42b5edb346a8daaf9e732f9f8c317d763e48ac.zip
realtek_mst_i2c_spi.c: Update PAGE_SIZE and fix write
Update the PAGE_SIZE to 128 as fix r/w on different devices, also fix the write page mapping for it. BUG=b:147402710 TEST=build and run flashrom to read&write on multiple devices Signed-off-by: Shiyu Sun <sshiyu@chromium.org> Change-Id: Ifcdd3548519eb37440e67fcf6206279cff05b159 Reviewed-on: https://review.coreboot.org/c/flashrom/+/48840 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--realtek_mst_i2c_spi.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/realtek_mst_i2c_spi.c b/realtek_mst_i2c_spi.c
index 80caf8669..dabec70b5 100644
--- a/realtek_mst_i2c_spi.c
+++ b/realtek_mst_i2c_spi.c
@@ -28,7 +28,7 @@
#define MCU_I2C_SLAVE_ADDR 0x94
#define REGISTER_ADDRESS (0x94 >> 1)
-#define PAGE_SIZE 256
+#define PAGE_SIZE 128
#define MAX_SPI_WAIT_RETRIES 1000
#define MCU_MODE 0x6F
@@ -386,7 +386,8 @@ static int realtek_mst_i2c_spi_write_256(struct flashctx *flash, const uint8_t *
ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, page_len-1);
uint8_t block_idx = (start + i) >> 16;
uint8_t page_idx = (start + i) >> 8;
- ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, 0);
+ uint8_t byte_idx = start + i;
+ ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx);
if (ret)
break;