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authorEdward O'Callaghan <quasisec@chromium.org>2019-05-03 02:27:24 -0400
committerEdward O'Callaghan <quasisec@chromium.org>2021-02-28 02:01:04 +0000
commitf3359e50de810d506670f2efd7d6adc802e69876 (patch)
tree60203aae34abff7209742e6e481cc469e8502cf4
parentf1391c756f315af7acc2494f9524b78f14d62bef (diff)
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Add support for Adesto AT25SF128A
The following adds support for the Adesto AT25SF128A-SHB-T part. We have varied the correct chip name is reported as well as write and read 16MBytes of random data and verified the checksum's match. Further, --wp-list appears to report the correct ranges. BUG=None BRANCH=none TEST=Ran flashrom with a Dediprog SF100, RW random data and checksum matched. Original-Change-Id: Ic22ca588f33753fdf492e8445324bcc0a809d3e2 Original-Signed-off-by: Edward O'Callaghan <quasisec@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/1593201 Original-Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Original-Tested-by: Martin Roth <martinroth@chromium.org> Original-Reviewed-by: Martin Roth <martinroth@chromium.org> (cherry picked from commit 1fa87e058b72a2de1e9127a45e9978361de48479) Note: this does not include the changes made to writeprotect.c in the original patch, as they depend on a large amount of additional writeprotect code that is currently only present in the cros tree, and the intention here is just to reduce the diff in flashchips.c. The `.wp` field has also been removed. Change-Id: I1ce2a6699a1f0116306f668123673a1ba9c932d2 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/51097 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
-rw-r--r--flashchips.c38
-rw-r--r--flashchips.h1
2 files changed, 39 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c
index 6d94a1252..4aaa8ac4a 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -2293,6 +2293,44 @@ const struct flashchip flashchips[] = {
{
.vendor = "Atmel",
+ .name = "AT25SF128A",
+ .bustype = BUS_SPI,
+ .manufacture_id = ATMEL_ID,
+ .model_id = ATMEL_AT25SF128A,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
+ .tested = TEST_OK_PR,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 4096} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 512} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_bp4_srwd,
+ .unlock = spi_disable_blockprotect_bp4_srwd,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1700, 2000},
+ },
+
+ {
+ .vendor = "Atmel",
.name = "AT25SF161",
.bustype = BUS_SPI,
.manufacture_id = ATMEL_ID,
diff --git a/flashchips.h b/flashchips.h
index a85fa6a6b..2ad09df73 100644
--- a/flashchips.h
+++ b/flashchips.h
@@ -152,6 +152,7 @@
#define ATMEL_AT25SF161 0x8601
#define ATMEL_AT25SF321 0x8701
#define ATMEL_AT25SL128A 0x4218
+#define ATMEL_AT25SF128A 0x8901 /* Adesto AT25SF128A */
#define ATMEL_AT26DF041 0x4400
#define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */
#define ATMEL_AT26DF081A 0x4501