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authorZoltan HERPAI <wigyori@uid0.hu>2020-08-08 16:04:34 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-12-11 09:16:05 +0000
commitf634a0dcc61ba0b972320c8a687268d0e02ac491 (patch)
treead0d9be50eab0dbd3d4cda6059db14c8c4176484
parenta7855506c8f919aba0b9e0f1f86f4d51d3bb0193 (diff)
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flashchips: Mark Intel 25F640S33B8 as TESTED_PREW
Tested with ch341a_spi from an Atheros AP81 reference board. Change-Id: I67b5962a1ae26fd1bc7e3889f1616def28b599ef Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> Reviewed-on: https://review.coreboot.org/c/flashrom/+/44342 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--flashchips.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c
index bc5de4afd..c4a1e6f8a 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7813,7 +7813,7 @@ const struct flashchip flashchips[] = {
.page_size = 256,
/* OTP: 506B total (2x 8B, 30x 16B, 1x 10B); read 0x4B; write 0x42 */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
- .tested = TEST_UNTESTED,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =