Add a bunch of new/tested stuff and various small changes 22

Tested mainboards:
OK:
 - AOpen UK79G-1394 (used in EZ18 barebones)
   Reported by Lawrence Gough
 - ASUS M4N78 SE
   Reported by Dima Veselov
 - ASUS P5LD2-VM
   Mark board enable as tested (reported by Dima Veselov)
 - GIGABYTE GA-970A-UD3P (rev. 2.0)
   Reported by trucmar on IRC
 - GIGABYTE GA-990FXA-UD3 (rev. 4.0)
   Reported by ROKO__ on IRC
 - GIGABYTE GA-H77-DS3H (rev. 1.1)
   Reported by Evgeniy Edigarev
 - GIGABYTE GA-P55-USB3 (rev. 2.0)
   Reported by Måns Thörnqvist
 - MSI MS-7817 (H81M-E33)
   Reported by Igor Kolker

Chipsets:
 - Marked Intel Bay Trail (0x0f1c) as tested OK
   Reported by Antonio Ospite
 - Refine Intel IDs
    * Add IDs for Braswell
    * Add IDs for 9 Series PCHs (e.g. H97, Z97)
    * Rename Wellsburg devices slightly

Flash chips:
 - Atmel AT25DF041A to PREW (+PREW)
   Reported by Tai-hwa Liang
 - Atmel AT26DF161 to PREW (+EW)
   Reported by Steve Shenton
 - Atmel AT45DB011D to PREW (+PREW)
   Reported by The Raven
 - Atmel AT45DB642D to PREW (+PREW)
   Reported by Mahesh Mokal
 - Eon EN25F32 to PREW (+PREW)
   Reported by Arman Khodabande
 - Eon EN25F40 to PREW (+REW)
   Reported by Jerrad Pierce
 - Eon EN25QH16 to PREW (+EW)
   Reported by Ben Johnson
 - GigaDevice GD25Q20(B) to PREW (+PREW)
   Reported by Gilles Aurejac
 - Macronix MX25U6435E/F to PR (+PR)
   Reported by Matt Taggart
 - PMC Pm25LV512(A) to PREW (+PREW)
   Reported by The Raven
 - SST SST39VF020 to PREW (+PREW)
   Reported by Urja Rannikko
 - Winbond W25Q40.V to PREW (+EW)
   Reported by Torben Nielsen
 - Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E).
 - Add MX25L6465E variant.
 - There was never a MX25L12805 AFAICT.
 - Split MX25L12805 from models with the same ID but an additional 32 kB
   eraser: MX25L12835F/MX25L12845E/MX25L12865E.
 - Add a bunch of ST parallel NOR flash chip IDs.

Miscellaneous:
 - Whitelist ThinkPad X200.
 - Constify master parameter of register_master().
 - Remove FEATURE_BYTEWRITES because it was never used at all.
 - Refine hwseq messages and make them less prominent.
 - Fix the yet unused PRIxCHIPADDR format string thingy.
 - Fix copy&paste error in spi_prettyprint_status_register_bp().
   Spotted by Pablo Cases.
 - Add an additional SMBus controller revision to identify another Yangtze
   model. Thanks to Dan Christensen for reporting this issue.
 - dediprog: add missing include for stdlib.h.
   This fixes (at least) building on FreeBSD and DragonflyBSD with gcc.
 - Remove references to struct pci_filter from programmer.h.
   It is only needed in internal.c where it has a complete type. Having
   it in programmer.h provokes a warning by some old versions of gcc.
 - Tiny other stuff.

Corresponding to flashrom svn r1879.

Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

1 files changed, 42 insertions, 36 deletions

diff --git a/chipset_enable.c b/chipset_enable.c
index dd4e0ea37..89171b726 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -451,7 +451,7 @@ static int enable_flash_ich_fwh_decode(struct pci_dev *dev, enum ich_chipset ich
 			fwh_idsel_old = mmio_readl(ilb + fwh_sel1);
 			rmmio_writel(fwh_idsel, ilb + fwh_sel1);
 		} else {
-			fwh_idsel_old = pci_read_long(dev, fwh_sel1) << 16;
+			fwh_idsel_old = (uint64_t)pci_read_long(dev, fwh_sel1) << 16;
 			rpci_write_long(dev, fwh_sel1, (fwh_idsel >> 16) & 0xffffffff);
 			if (fwh_sel2 > 0) {
 				fwh_idsel_old |= pci_read_word(dev, fwh_sel2);
@@ -1593,7 +1593,7 @@ const struct penable chipset_enables[] = {
 	{0x1166, 0x0205, OK,  "Broadcom", "HT-1000",			enable_flash_ht1000},
 	{0x17f3, 0x6030, OK,  "RDC", "R8610/R3210",			enable_flash_rdc_r8610},
 	{0x8086, 0x0c60, NT,  "Intel", "S12x0",				enable_flash_s12x0},
-	{0x8086, 0x0f1c, NT,  "Intel", "Bay Trail",			enable_flash_silvermont},
+	{0x8086, 0x0f1c, OK,  "Intel", "Bay Trail",			enable_flash_silvermont},
 	{0x8086, 0x0f1d, NT,  "Intel", "Bay Trail",			enable_flash_silvermont},
 	{0x8086, 0x0f1e, NT,  "Intel", "Bay Trail",			enable_flash_silvermont},
 	{0x8086, 0x0f1f, NT,  "Intel", "Bay Trail",			enable_flash_silvermont},
@@ -1635,6 +1635,7 @@ const struct penable chipset_enables[] = {
 	{0x8086, 0x1f39, NT,  "Intel", "Avoton/Rangeley",		enable_flash_silvermont},
 	{0x8086, 0x1f3a, NT,  "Intel", "Avoton/Rangeley",		enable_flash_silvermont},
 	{0x8086, 0x1f3b, NT,  "Intel", "Avoton/Rangeley",		enable_flash_silvermont},
+	{0x8086, 0x229c, NT,  "Intel", "Braswell",			enable_flash_silvermont},
 	{0x8086, 0x2310, NT,  "Intel", "DH89xxCC (Cave Creek)",		enable_flash_pch7},
 	{0x8086, 0x2390, NT,  "Intel", "Coleto Creek",			enable_flash_pch7},
 	{0x8086, 0x2410, OK,  "Intel", "ICH",				enable_flash_ich0},
@@ -1730,42 +1731,47 @@ const struct penable chipset_enables[] = {
 	{0x8086, 0x8c5d, NT,  "Intel", "Lynx Point",			enable_flash_pch8},
 	{0x8086, 0x8c5e, NT,  "Intel", "Lynx Point",			enable_flash_pch8},
 	{0x8086, 0x8c5f, NT,  "Intel", "Lynx Point",			enable_flash_pch8},
+	{0x8086, 0x8cc1, NT,  "Intel", "9 Series",			enable_flash_pch9},
+	{0x8086, 0x8cc2, NT,  "Intel", "9 Series Engineering Sample",	enable_flash_pch9},
+	{0x8086, 0x8cc3, NT,  "Intel", "9 Series",			enable_flash_pch9},
+	{0x8086, 0x8cc4, NT,  "Intel", "Z97",				enable_flash_pch9},
+	{0x8086, 0x8cc6, NT,  "Intel", "H97",				enable_flash_pch9},
+	{0x8086, 0x8d40, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d41, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d42, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d43, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d44, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d45, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d46, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d47, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d48, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d49, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d4a, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d4b, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d4c, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d4d, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d4e, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d4f, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d50, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d51, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d52, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d53, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d54, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d55, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d56, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d57, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d58, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d59, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d5a, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d5b, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d5c, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d5d, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d5e, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
+	{0x8086, 0x8d5f, NT,  "Intel", "C610/X99 (Wellsburg)",		enable_flash_pch8_wb},
 	{0x8086, 0x9c41, NT,  "Intel", "Lynx Point LP Eng. Sample",	enable_flash_pch8_lp},
 	{0x8086, 0x9c43, NT,  "Intel", "Lynx Point LP Premium",		enable_flash_pch8_lp},
 	{0x8086, 0x9c45, NT,  "Intel", "Lynx Point LP Mainstream",	enable_flash_pch8_lp},
 	{0x8086, 0x9c47, NT,  "Intel", "Lynx Point LP Value",		enable_flash_pch8_lp},
- 	{0x8086, 0x8d40, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d41, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d42, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d43, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d44, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d45, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d46, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d47, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d48, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d49, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d4a, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d4b, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d4c, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d4d, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d4e, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d4f, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d50, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d51, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d52, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d53, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d54, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d55, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d56, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d57, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d58, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d59, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d5a, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d5b, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d5c, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d5d, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d5e, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
- 	{0x8086, 0x8d5f, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
 	{0x8086, 0x9cc1, NT,  "Intel", "Haswell U Sample",		enable_flash_pch9},
 	{0x8086, 0x9cc2, NT,  "Intel", "Broadwell U Sample",		enable_flash_pch9},
 	{0x8086, 0x9cc3, NT,  "Intel", "Broadwell U Premium",		enable_flash_pch9},
@@ -1807,10 +1813,10 @@ int chipset_flash_enable(void)
 		msg_pdbg(" with PCI ID %04x:%04x",
 			 chipset_enables[i].vendor_id,
 			 chipset_enables[i].device_id);
-		msg_pinfo(". ");
+		msg_pinfo(".\n");
 
 		if (chipset_enables[i].status == NT) {
-			msg_pinfo("\nThis chipset is marked as untested. If "
+			msg_pinfo("This chipset is marked as untested. If "
 				  "you are using an up-to-date version\nof "
 				  "flashrom *and* were (not) able to "
 				  "successfully update your firmware with it,\n"