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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-08-21 17:26:13 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-08-21 17:26:13 +0000
commit95baaadee5e342d2b940b31d394f2ed3b639c48b (patch)
tree01f56aca8674a6eba9d00a807ef55ba0b89dabb1 /chipset_enable.c
parenta02d666436d2960c3ae1a6d4b85fe4c0d08c9371 (diff)
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Add support for ICH9 engineering sample
Anne Le Coq <annyvonne.le_coq@alcatel-lucent.fr> reported that flashrom didn't recognize her ICH9 LPC controller on the Green City Intel Customer Reference Board with ICH9 + Tylersburg Chipset. According to http://pci-ids.ucw.cz/read/PC/8086/2910 the ID 0x8086/0x2910 was used for engineering samples. No intel doc mentions this ID at all. Corresponding to flashrom svn r696. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Anne Le Coq <annyvonne.le_coq@alcatel-lucent.fr>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r--chipset_enable.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c
index ab68598f7..ed3a374df 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1012,6 +1012,7 @@ const struct penable chipset_enables[] = {
{0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9},
{0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9},
{0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9},
+ {0x8086, 0x2910, OK, "Intel", "ICH9 Engineering Sample", enable_flash_ich9},
{0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4},
{0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4},
{0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4},