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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-12-16 21:15:27 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-12-16 21:15:27 +0000 |
commit | f5df46f6c697b7b79faec25c5b2919b328f67fc0 (patch) | |
tree | 4d59e9d65c99f3ebdffa0aea47487716421dd459 /flash.h | |
parent | 4bcf1751908fa3177de87b43c5b0837074e3bb8e (diff) | |
download | flashrom-f5df46f6c697b7b79faec25c5b2919b328f67fc0.tar.gz flashrom-f5df46f6c697b7b79faec25c5b2919b328f67fc0.tar.bz2 flashrom-f5df46f6c697b7b79faec25c5b2919b328f67fc0.zip |
Add support for ST M25P80 chips
Detection was tested. Print status register before erase to help
debugging block locks.
Corresponding to flashrom svn r164 and coreboot v2 svn r3008.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Diffstat (limited to 'flash.h')
-rw-r--r-- | flash.h | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -167,7 +167,12 @@ extern struct flashchip flashchips[]; #define SST_49LF016C 0x5C #define SST_49LF160C 0x4C +/* + * ST25P chips are SPI, first byte of device ID is memory type, second + * byte of device ID is related to log(bitsize) at least for some chips. + */ #define ST_ID 0x20 /* ST */ +#define ST_M25P80 0x2014 #define ST_M50FLW040A 0x08 #define ST_M50FLW040B 0x28 #define ST_M50FLW080A 0x80 |