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authorAngel Pons <th3fanbus@gmail.com>2018-09-30 20:28:22 +0200
committerNico Huber <nico.h@gmx.de>2018-10-03 11:55:55 +0000
commit250aebaadba0bfcd8dd25558e9e5a9aaa3b15c43 (patch)
treeed4947e32d351ad00ece54185f8033cdd10ae8a1 /flashchips.c
parent3164a0cb28aa592f93d1a07ec11b01cc2039e87d (diff)
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flashchips: Mark Atmel AT45DB081D as tested
As per `The_Raven Raven` on the mailing list. Change-Id: I225984b9e2589713f25d0f9b49eb1c3abdcff3cd Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28825 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'flashchips.c')
-rw-r--r--flashchips.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c
index f4b5e8d86..892b2f357 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -2791,7 +2791,7 @@ const struct flashchip flashchips[] = {
/* does not support EWSR nor WREN and has no writable status register bits whatsoever */
/* OTP: 128B total, 64B pre-programmed; read 0x77; write 0x9B */
.feature_bits = FEATURE_OTP,
- .tested = TEST_UNTESTED,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_at45db,
.probe_timing = TIMING_ZERO,
.block_erasers =