diff options
| author | Nico Huber <nico.h@gmx.de> | 2017-11-10 21:10:20 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-01-02 20:15:30 +0000 |
| commit | fe34d2af28bd81aaa1e23ba38febaa98ec4bb90c (patch) | |
| tree | 53bda4d3445a94505455ffb12a96da602ba97af6 /flashchips.c | |
| parent | 1cf407b4f8d56035816efaf936a40553441eca46 (diff) | |
| download | flashrom-fe34d2af28bd81aaa1e23ba38febaa98ec4bb90c.tar.gz flashrom-fe34d2af28bd81aaa1e23ba38febaa98ec4bb90c.tar.bz2 flashrom-fe34d2af28bd81aaa1e23ba38febaa98ec4bb90c.zip | |
spi25: Revise decision when to enter/exit 4BA mode
Instead of arbitrarily deciding whether to enter 4BA mode in the flash
chip's declaration, advertise that entering 4BA mode is supported and
only enter it if the SPI master supports 4-byte addresses. If not, exit
4BA mode (the chip might be in 4BA mode after reset). If we can't assure
the state of 4BA mode, we bail out to simplify the code (we'd have to
ensure that we don't run any instructions that can usually be switched
to 4BA mode otherwise).
Two new feature flags are introduced:
* FEATURE_4BA_ENTER:
Can enter/exit 4BA mode with instructions 0xb7/0xe9 w/o WREN.
* FEATURE_4BA_ENTER_WREN
Can enter/exit 4BA mode with instructions 0xb7/0xe9 after WREN.
FEATURE_4BA_SUPPORT is dropped, it's completely implicit now.
Also, draw the with/without WREN distinction into the enter/exit
functions to reduce code redundancy.
Change-Id: I877fe817f801fc54bd0ee2ce4e3ead324cbb3673
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22422
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'flashchips.c')
| -rw-r--r-- | flashchips.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/flashchips.c b/flashchips.c index c8ea5eb90..0e16a48ce 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8134,7 +8134,7 @@ const struct flashchip flashchips[] = { .total_size = 32768, .page_size = 256, /* OTP: 512B total; enter 0xB1, exit 0xC1 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -8162,7 +8162,6 @@ const struct flashchip flashchips[] = { .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ - .set_4ba = spi_enter_4ba_b7, .voltage = {2700, 3600}, }, @@ -8175,7 +8174,7 @@ const struct flashchip flashchips[] = { .total_size = 65536, .page_size = 256, /* OTP: 512B total; enter 0xB1, exit 0xC1 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -8203,7 +8202,6 @@ const struct flashchip flashchips[] = { .unlock = spi_disable_blockprotect_bp3_srwd, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) supported */ - .set_4ba = spi_enter_4ba_b7, .voltage = {2700, 3600}, }, @@ -9916,7 +9914,8 @@ const struct flashchip flashchips[] = { .page_size = 256, /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ | FEATURE_4BA_WRITE, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP + | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ | FEATURE_4BA_WRITE, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -9949,7 +9948,8 @@ const struct flashchip flashchips[] = { .page_size = 256, /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ | FEATURE_4BA_WRITE, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP + | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ | FEATURE_4BA_WRITE, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -14827,7 +14827,7 @@ const struct flashchip flashchips[] = { /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_READ, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -14854,7 +14854,6 @@ const struct flashchip flashchips[] = { .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, - .set_4ba = spi_enter_4ba_b7_we, .voltage = {2700, 3600}, }, |