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authorAngel Pons <th3fanbus@gmail.com>2018-09-30 20:04:14 +0200
committerNico Huber <nico.h@gmx.de>2018-10-03 11:52:28 +0000
commitbce364ca7873196714ff54314049e23a2feee62c (patch)
tree0d291e00cba81d530d2ced0b46c56e94d2483f99 /flashchips.c
parent6f08835c0ab7ab35888cf675e280104420620eb9 (diff)
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flashchips: Mark GigaDevice GD25Q128C as tested
As per Tomasz Walach on the mailing list. Change-Id: Ib0d7485c7221f92ec13995c58065a48e08f57cd8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28819 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'flashchips.c')
-rw-r--r--flashchips.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c
index a70d9539e..45a392f46 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6398,7 +6398,7 @@ const struct flashchip flashchips[] = {
/* OTP: 1536B total; read 0x48; write 0x42, erase 0x44 */
/* QPI: enable 0x38, disable 0xFF */
.feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
- .tested = TEST_UNTESTED,
+ .tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =