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author | Lubomir Rintel <lkundrak@v3.sk> | 2018-01-14 17:35:33 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2018-06-26 10:02:38 +0000 |
commit | b2154e8a1d456875122cbbff2a18e5e1c55ef4d2 (patch) | |
tree | ee5cf1e29adf35b89d6078ba117638b4009cfd89 /flashrom.8.tmpl | |
parent | ac01baa073b0f154ffd3ffdc7c9e75987f8b525c (diff) | |
download | flashrom-b2154e8a1d456875122cbbff2a18e5e1c55ef4d2.tar.gz flashrom-b2154e8a1d456875122cbbff2a18e5e1c55ef4d2.tar.bz2 flashrom-b2154e8a1d456875122cbbff2a18e5e1c55ef4d2.zip |
digilent_spi: add a driver for the iCEblink40 development board
This is driver that supports the Lattice iCE40 evaluation kits. On the
board is a SPI flash memory chip labeled ST 25P10VP.
Tested to work read/write/erase with "-p digilent_spi -c M25P10" or
with a patch that resets the part beforehands (in which case it gets
detected as a M25P10-A and is way faster due to paged writes).
Change-Id: I7ffcd9a2db4395816f0e8b6ce6c3b0d8e930c9e6
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/23338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'flashrom.8.tmpl')
-rw-r--r-- | flashrom.8.tmpl | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index a3528f14a..70af395f1 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -303,6 +303,8 @@ bitbanging adapter) .sp .BR "* ch341a_spi" " (for SPI flash ROMs attached to WCH CH341A)" .sp +.BR "* digilent_spi" " (for SPI flash ROMs attached to iCEblink40 development boards)" +.sp Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER-SPECIFIC INFORMATION @@ -1083,6 +1085,23 @@ Please also note that the mstarddc_spi driver only works on Linux. .BR "ch341a_spi " programmer The WCH CH341A programmer does not support any parameters currently. SPI frequency is fixed at 2 MHz, and CS0 is used as per the device. +.SS +.BR "digilent_spi " programmer +.IP +An optional +.B spispeed +parameter specifies the frequency of the SPI bus. +Syntax is +.sp +.B " flashrom \-p digilent_spi:spispeed=frequency" +.sp +where +.B frequency +can be +.BR 62.5k ", " 125k ", " 250k ", " 500k ", " 1M ", " 2M " or " 4M +(in Hz). The default is a frequency of 4 MHz. +.sp +.SS .SH EXAMPLES To back up and update your BIOS, run .sp @@ -1152,8 +1171,8 @@ needs no access permissions at all. .BR gfxnvidia ", " drkaiser ", " satasii ", " satamv ", " atahpt ", " atavia " and " atapromise have to be run as superuser/root, and need additional raw access permission. .sp -.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi ", " pickit2_spi " and " \ -ch341a_spi +.BR serprog ", " buspirate_spi ", " dediprog ", " usbblaster_spi ", " ft2232_spi ", " pickit2_spi ", " \ +ch341a_spi " and " digilent_spi can be run as normal user on most operating systems if appropriate device permissions are set. .sp |