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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2010-07-17 22:42:33 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2010-07-17 22:42:33 +0000
commitfb2c4c3f72411ea25ddaf59739cd5328c8210648 (patch)
treefd28100f4a2dfcf557dfbe62854a4fc0a0a47883 /gfxnvidia.c
parent44cd9ab0805d1d9e9a7d8f7af7ae4270b5d66753 (diff)
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Refine PCI BAR masks handling for drkaiser and gfxnvidia
Use the BAR value returned by pcidev_init which automatically applies the correct BAR mask for the drkaiser driver. Truncate flash chip addresses to fit into the 128 kB memory window for drkaiser and pick the same window size for gfxnvidia. Uwe tested all operations successfully on a Dr. Kaiser card. Corresponding to flashrom svn r1089. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'gfxnvidia.c')
-rw-r--r--gfxnvidia.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/gfxnvidia.c b/gfxnvidia.c
index 962ba1a07..29e2910fa 100644
--- a/gfxnvidia.c
+++ b/gfxnvidia.c
@@ -25,6 +25,11 @@
#define PCI_VENDOR_ID_NVIDIA 0x10de
+/* Mask to restrict flash accesses to a 128kB memory window.
+ * FIXME: Is this size a one-fits-all or card dependent?
+ */
+#define GFXNVIDIA_MEMMAP_MASK ((1 << 17) - 1)
+
uint8_t *nvidia_bar;
const struct pcidev_status gfx_nvidia[] = {
@@ -95,10 +100,10 @@ int gfxnvidia_shutdown(void)
void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr)
{
- mmio_writeb(val, nvidia_bar + addr);
+ mmio_writeb(val, nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK));
}
uint8_t gfxnvidia_chip_readb(const chipaddr addr)
{
- return mmio_readb(nvidia_bar + addr);
+ return mmio_readb(nvidia_bar + (addr & GFXNVIDIA_MEMMAP_MASK));
}