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author | Nico Huber <nico.h@gmx.de> | 2021-05-13 16:11:35 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2021-05-13 16:11:35 +0200 |
commit | a2b33b9f300ec22832367b10ab49fff6f179dcc5 (patch) | |
tree | 8396c4d0a5d5e432228427d873711a4b6a52963e /ichspi.c | |
parent | 36c401dc3cd3fad833c48be78aa9b265eb84320f (diff) | |
download | flashrom-a2b33b9f300ec22832367b10ab49fff6f179dcc5.tar.gz flashrom-a2b33b9f300ec22832367b10ab49fff6f179dcc5.tar.bz2 flashrom-a2b33b9f300ec22832367b10ab49fff6f179dcc5.zip |
Revert "Add Gemini Lake support"
This reverts commit 36c401dc3cd3fad833c48be78aa9b265eb84320f.
Pushed by accident without review.
Diffstat (limited to 'ichspi.c')
-rw-r--r-- | ichspi.c | 11 |
1 files changed, 2 insertions, 9 deletions
@@ -1740,7 +1740,6 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: - case CHIPSET_GEMINI_LAKE: num_pr = 6; /* Includes GPR0 */ reg_pr0 = PCH100_REG_FPR0; swseq_data.reg_ssfsc = PCH100_REG_SSFSC; @@ -1773,7 +1772,6 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: - case CHIPSET_GEMINI_LAKE: num_freg = 16; break; default: @@ -1870,7 +1868,6 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: - case CHIPSET_GEMINI_LAKE: tmp = mmio_readl(spibar + PCH100_REG_DLOCK); msg_pdbg("0x0c: 0x%08x (DLOCK)\n", tmp); prettyprint_pch100_reg_dlock(tmp); @@ -1946,7 +1943,6 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: - case CHIPSET_GEMINI_LAKE: case CHIPSET_BAYTRAIL: break; default: @@ -1980,7 +1976,6 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_APOLLO_LAKE: - case CHIPSET_GEMINI_LAKE: break; default: tmp = mmio_readl(spibar + ICH9_REG_FPB); @@ -2017,10 +2012,8 @@ int ich_init_spi(void *spibar, enum ich_chipset ich_gen) ich_spi_mode = ich_hwseq; } - if (ich_spi_mode == ich_auto && - (ich_gen == CHIPSET_APOLLO_LAKE || - ich_gen == CHIPSET_GEMINI_LAKE)) { - msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini Lake.\n"); + if (ich_spi_mode == ich_auto && ich_gen == CHIPSET_APOLLO_LAKE) { + msg_pdbg("Enabling hardware sequencing by default for Apollo Lake.\n"); ich_spi_mode = ich_hwseq; } |