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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2010-06-14 14:18:37 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2010-06-14 14:18:37 +0000
commit2eda391bdf10d824986ec8761874e8a00e495b8e (patch)
tree24e12d10fefac41ce865de53694939a1674dcd0e /nicrealtek.c
parent5cacf8c974faa6e2cb81c7ac0214593437cf35ff (diff)
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The nicrealtek code uses magic constants, but they are not explained
That's OK if you know the datasheet well, but for casual readers some comments are really helpful. I'm not sure whether we want to disable hardware flash access forever without enabling it again on shutdown. A few other places made me wonder as well. I've added FIXME comments in those places. Corresponding to flashrom svn r1046. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Andrew Morgan <ziltro@ziltro.com>
Diffstat (limited to 'nicrealtek.c')
-rw-r--r--nicrealtek.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/nicrealtek.c b/nicrealtek.c
index ad39eb22c..6825c0cb4 100644
--- a/nicrealtek.c
+++ b/nicrealtek.c
@@ -65,6 +65,7 @@ int nicsmc1211_init(void)
int nicrealtek_shutdown(void)
{
+ /* FIXME: We forgot to disable software access again. */
free(programmer_param);
pci_cleanup(pacc);
release_io_perms();
@@ -73,8 +74,14 @@ int nicrealtek_shutdown(void)
void nicrealtek_chip_writeb(uint8_t val, chipaddr addr)
{
+ /* Output addr and data, set WE to 0, set OE to 1, set CS to 0,
+ * enable software access.
+ */
OUTL(((uint32_t)addr & 0x01FFFF) | 0x0A0000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
+ /* Output addr and data, set WE to 1, set OE to 1, set CS to 1,
+ * enable software access.
+ */
OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
}
@@ -83,11 +90,20 @@ uint8_t nicrealtek_chip_readb(const chipaddr addr)
{
uint8_t val;
+ /* FIXME: Can we skip reading the old data and simply use 0? */
+ /* Read old data. */
val = INB(io_base_addr + BIOS_ROM_DATA);
+ /* Output new addr and old data, set WE to 1, set OE to 0, set CS to 0,
+ * enable software access.
+ */
OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);
+ /* Read new data. */
val = INB(io_base_addr + BIOS_ROM_DATA);
+ /* Output addr and new data, set WE to 1, set OE to 1, set CS to 1,
+ * enable software access.
+ */
OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24),
io_base_addr + BIOS_ROM_ADDR);