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authorStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>2015-02-08 21:57:52 +0000
committerStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>2015-02-08 21:57:52 +0000
commit5c316f954941241ed75a1f00f00bf1bff318488a (patch)
treece836bcb29d7d9da86ee583a88236b020985ba36 /sb600spi.c
parentdc627931848ed6af40be4f7d5bdb8e33d28b8333 (diff)
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Add a bunch of new/tested stuff and various small changes 22
Tested mainboards: OK: - AOpen UK79G-1394 (used in EZ18 barebones) Reported by Lawrence Gough - ASUS M4N78 SE Reported by Dima Veselov - ASUS P5LD2-VM Mark board enable as tested (reported by Dima Veselov) - GIGABYTE GA-970A-UD3P (rev. 2.0) Reported by trucmar on IRC - GIGABYTE GA-990FXA-UD3 (rev. 4.0) Reported by ROKO__ on IRC - GIGABYTE GA-H77-DS3H (rev. 1.1) Reported by Evgeniy Edigarev - GIGABYTE GA-P55-USB3 (rev. 2.0) Reported by Måns Thörnqvist - MSI MS-7817 (H81M-E33) Reported by Igor Kolker Chipsets: - Marked Intel Bay Trail (0x0f1c) as tested OK Reported by Antonio Ospite - Refine Intel IDs * Add IDs for Braswell * Add IDs for 9 Series PCHs (e.g. H97, Z97) * Rename Wellsburg devices slightly Flash chips: - Atmel AT25DF041A to PREW (+PREW) Reported by Tai-hwa Liang - Atmel AT26DF161 to PREW (+EW) Reported by Steve Shenton - Atmel AT45DB011D to PREW (+PREW) Reported by The Raven - Atmel AT45DB642D to PREW (+PREW) Reported by Mahesh Mokal - Eon EN25F32 to PREW (+PREW) Reported by Arman Khodabande - Eon EN25F40 to PREW (+REW) Reported by Jerrad Pierce - Eon EN25QH16 to PREW (+EW) Reported by Ben Johnson - GigaDevice GD25Q20(B) to PREW (+PREW) Reported by Gilles Aurejac - Macronix MX25U6435E/F to PR (+PR) Reported by Matt Taggart - PMC Pm25LV512(A) to PREW (+PREW) Reported by The Raven - SST SST39VF020 to PREW (+PREW) Reported by Urja Rannikko - Winbond W25Q40.V to PREW (+EW) Reported by Torben Nielsen - Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E). - Add MX25L6465E variant. - There was never a MX25L12805 AFAICT. - Split MX25L12805 from models with the same ID but an additional 32 kB eraser: MX25L12835F/MX25L12845E/MX25L12865E. - Add a bunch of ST parallel NOR flash chip IDs. Miscellaneous: - Whitelist ThinkPad X200. - Constify master parameter of register_master(). - Remove FEATURE_BYTEWRITES because it was never used at all. - Refine hwseq messages and make them less prominent. - Fix the yet unused PRIxCHIPADDR format string thingy. - Fix copy&paste error in spi_prettyprint_status_register_bp(). Spotted by Pablo Cases. - Add an additional SMBus controller revision to identify another Yangtze model. Thanks to Dan Christensen for reporting this issue. - dediprog: add missing include for stdlib.h. This fixes (at least) building on FreeBSD and DragonflyBSD with gcc. - Remove references to struct pci_filter from programmer.h. It is only needed in internal.c where it has a complete type. Having it in programmer.h provokes a warning by some old versions of gcc. - Tiny other stuff. Corresponding to flashrom svn r1879. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Diffstat (limited to 'sb600spi.c')
-rw-r--r--sb600spi.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sb600spi.c b/sb600spi.c
index 69fad65ce..37ecfd97a 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -141,7 +141,7 @@ static void determine_generation(struct pci_dev *dev)
} else if (rev == 0x16) {
amd_gen = CHIPSET_BOLTON;
msg_pdbg("Bolton detected.\n");
- } else if (rev >= 0x39 && rev <= 0x3A) {
+ } else if ((rev >= 0x39 && rev <= 0x3A) || rev == 0x42) {
amd_gen = CHIPSET_YANGTZE;
msg_pdbg("Yangtze detected.\n");
} else {
@@ -498,7 +498,7 @@ static int handle_imc(struct pci_dev *dev)
free(arg);
/* TODO: we should not only look at IntegratedImcPresent (LPC Dev 20, Func 3, 40h) but also at
- * IMCEnable(Strap) and Override EcEnable(Strap) (sb8xx, sb9xx?, a50: Misc_Reg: 80h-87h;
+ * IMCEnable(Strap) and Override EcEnable(Strap) (sb8xx, sb9xx?, a50, Bolton: Misc_Reg: 80h-87h;
* sb7xx, sp5100: PM_Reg: B0h-B1h) etc. */
uint8_t reg = pci_read_byte(dev, 0x40);
if ((reg & (1 << 7)) == 0) {