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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-13 11:40:08 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-13 11:40:08 +0000
commit3e9dbea1ce9c94a879deccc48bd72c60eb4b3454 (patch)
tree507387aa6b99ba2538d054a6662233927750ba19 /spi.h
parentb4dcb7188ff557c6722f862a61e806f901c17889 (diff)
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There are various reasons why a SPI command can fail
Among others, I have seen the following problems: - The SPI opcode is not supported by the controller. ICH-style controllers exhibit this if SPI config is locked down. - The address in in a prohibited area. This can happen on ICH for any access (BBAR) and for writes in chipset write protected areas. - There is no SPI controller. Introduce separate error codes for unsupported opcode and prohibited address. Add the ability to adjust REMS and RES addresses to the minium supported read address with the help of spi_get_valid_read_addr(). That function needs to call SPI controller specific functions like reading BBAR on ICH. Corresponding to flashrom svn r500. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'spi.h')
-rw-r--r--spi.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/spi.h b/spi.h
index d3d980577..aa80c43ea 100644
--- a/spi.h
+++ b/spi.h
@@ -105,4 +105,8 @@
#define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05
#define JEDEC_BYTE_PROGRAM_INSIZE 0x00
+/* Error codes */
+#define SPI_INVALID_OPCODE -2
+#define SPI_INVALID_ADDRESS -3
+
#endif /* !__SPI_H__ */