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authorEdward O'Callaghan <quasisec@google.com>2020-04-12 17:27:53 +1000
committerAngel Pons <th3fanbus@gmail.com>2020-04-30 08:00:41 +0000
commite4ddc36371bc07c71889f21f9144160c756e9825 (patch)
tree013c09671b5c91189b9e75f684180252d3ef98e4 /spi25_statusreg.c
parente0272e2b6f8860152d0edf72263a80426fd7d5e3 (diff)
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const'ify flashctx to align signatures with cros flashrom
The ChromiumOS flashrom fork has since const'ify flashctx in a few places. This aligns the function signatures to match with downstream to ease forward porting patches out of downstream back into mainline flashrom. This patch is minimum viable alignment and so feedback is welcome. Change-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'spi25_statusreg.c')
-rw-r--r--spi25_statusreg.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/spi25_statusreg.c b/spi25_statusreg.c
index aa574d5a8..083a832f5 100644
--- a/spi25_statusreg.c
+++ b/spi25_statusreg.c
@@ -22,7 +22,7 @@
#include "spi.h"
/* === Generic functions === */
-static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode)
+static int spi_write_status_register_flag(const struct flashctx *flash, int status, const unsigned char enable_opcode)
{
int result;
int i = 0;
@@ -73,7 +73,7 @@ static int spi_write_status_register_flag(struct flashctx *flash, int status, co
return 0;
}
-int spi_write_status_register(struct flashctx *flash, int status)
+int spi_write_status_register(const struct flashctx *flash, int status)
{
int feature_bits = flash->chip->feature_bits;
int ret = 1;
@@ -90,7 +90,7 @@ int spi_write_status_register(struct flashctx *flash, int status)
return ret;
}
-uint8_t spi_read_status_register(struct flashctx *flash)
+uint8_t spi_read_status_register(const struct flashctx *flash)
{
static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
/* FIXME: No workarounds for driver/hardware bugs in generic code. */