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* Revert "Revert "Add Gemini Lake support""testpushNico Huber2021-05-136-7/+37
| | | | | | | | This reverts commit a2b33b9f300ec22832367b10ab49fff6f179dcc5. Change-Id: Id0106ecb2612d1c7b286c3b849a42756caf741cd Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54277
* Revert "Add Gemini Lake support"Nico Huber2021-05-136-37/+7
| | | | | | This reverts commit 36c401dc3cd3fad833c48be78aa9b265eb84320f. Pushed by accident without review.
* Add Gemini Lake supportAngel Pons2021-05-136-7/+37
| | | | | | | | The SPI hardware is pretty much unchanged from Apollo Lake. However, the IFD differs significantly enough to require special handling. Signed-off-by: Angel Pons <th3fanbus@gmail.com> Change-Id: I8843ace1f024da04c80b419011841ccae4e48990
* nicintel_eeprom.c: Mark 8086:1531 as testedAngel Pons2021-05-131-1/+1
| | | | | | | | | | | | Reading, erasing and writing works on an i210 NIC of an Asus Z10PA-D8. Change-Id: I9cabea5dfb9424b9c30d82840089506f2bd943da Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52825 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* linux_mtd: drop 'mtd_' prefix from variable/field namesNikolai Artemiev2021-05-131-27/+27
| | | | | | | | | | | | | BUG=b:161951062 BRANCH=none TEST=builds Change-Id: I2503c98e9111d1fecd911473f65eeea7031cfdc3 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/53953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* linux_mtd: move global state into programmer data fieldNikolai Artemiev2021-05-131-45/+65
| | | | | | | | | | | | | | BUG=b:161951062 BRANCH=none TEST=builds, reading /dev/mtd0 on Oak succeeds Change-Id: I5ce6900e4892ed5687cfddb245dfe5461a3e2e84 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/53947 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* usbblaster_spi.c: Refactor singleton states into reentrant patternAnastasia Klimchuk2021-05-121-8/+30
| | | | | | | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the spi_master data field for the life-time of the driver. This is one of the steps on the way to move spi_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". This patch also introduces shutdown function for usbblaster, because there was none previously and without shutdown function there is no way to free spi_master data at the end of driver lifecycle. BUG=b:185191942 TEST=builds Change-Id: Ia81f9f40c7eab430a8b304d0b197ce7c75bf5ace Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54044 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* digilent_spi.c: Refactor singleton states into reentrant patternAnastasia Klimchuk2021-05-121-47/+58
| | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the spi_master data field for the life-time of the driver. This is one of the steps on the way to move spi_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". BUG=b:185191942 TEST=builds Change-Id: I91b842913d4402a4a1bec896f19c2fe1f34772b1 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* pickit2_spi.c: Refactor singleton states into reentrant patternAnastasia Klimchuk2021-05-121-16/+37
| | | | | | | | | | | | | | | | | | | | Move global singleton states into a struct and store within the spi_master data field for the life-time of the driver. This is one of the steps on the way to move spi_master data memory management behind the initialisation API, for more context see other patches under the same topic "register_master_api". TEST=builds BUG=b:185191942 Change-Id: Ibacc4738bee02c371c41583d321e0337128ad18a Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* pickit2_spi.c: Separate shutdown from failed init cleanupAnastasia Klimchuk2021-05-121-14/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Shutdown function was covering two different jobs here: 1) the actual shutdown which is run at the end of the driver's lifecycle and 2) cleanup in cases when initialisation failed. Now, shutdown is only doing its main job (#1), and the driver itself is doing cleanup when init fails (#2). The good thing is that now resources are released/closed immediately in cases when init fails (vs shutdown function which was run at some point later), and the driver leaves clean space after itself if init fails. And very importantly this unlocks API change which plans to move register_shutdown inside register master API, see https://review.coreboot.org/c/flashrom/+/51761 TEST=builds BUG=b:185191942 Change-Id: I1b672b33169a7a1b6ceab190ad3f48c2f35c3a1f Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52773 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashchips: Fix 4BA advertisement for dummy chipNico Huber2021-05-121-1/+1
| | | | | | | | | | | | The dummyflasher only supports the native 4BA read and write commands, so only advertise these. Change-Id: Ia7340835ce1680d197f250bdb5990ab2ffe3671f Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54068 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Makefile: Only enable I2C programmers on LinuxAngel Pons2021-05-121-30/+10
| | | | | | | | | | The I2C support code they use is Linux-specific. Change-Id: I04d25ff8f8c3097428ac8695669b1757c38f49e9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/53999 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* realtek_mst_i2c_spi.c: Rename `PAGE_SIZE` macroAngel Pons2021-05-121-9/+9
| | | | | | | | | | This fixes building with musl libc on alpine:amd64-v3.9. Change-Id: I043e3d8c2d2498e94b5e7577a7378c8c3e0e6c81 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/53998 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* dediprog: Add 4BA support on SF600 protocol version 3Patrick Rudolph2021-05-111-1/+1
| | | | | | | | | | | | | Tested on SF600 protocol 3 V:7.2.45 Fixes the error message: "4-byte address requested but master can't handle 4-byte addresses." Change-Id: I2d91f940eb246b928a9d386eefb4195f9ccf1bb5 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/44811 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* dediprog: Disable SPI_MASTER_NO_4BA_MODES for additional devicesPatrick Rudolph2021-05-111-1/+2
| | | | | | | | | | | | | | | The SPI_MASTER_NO_4BA_MODES is for SPI master not keeping the flash powered between programming commands. Tests on the following devices showed that the power is stable accross commands: * SF100 protocol 2 V:6.5.03 * SF600 protocol 3 V:7.2.45 Change-Id: Iee0ba972245b9317ef86345432fec5fc32614888 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/44776 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* realtek_mst_i2c_spi: Use `i2c_open_from_programmer_params`Angel Pons2021-05-091-36/+5
| | | | | | | | | | | This allows using `buspath` to specify which I2C device to use. Change-Id: Ibdf07a9fde0ddfcda1c0bfa35a3e7cde5c22cedb Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52831 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* lspcon_i2c_spi: Extract I2C bus parameter handlingAngel Pons2021-05-093-61/+57
| | | | | | | | | | | | Introduce the `i2c_open_from_programmer_params` function to avoid having to duplicate parameter parsing code on all I2C programmers. This also allows having the same programmer parameters on all I2C programmers. Change-Id: I006b311c88feea37fe4b217f769b21ca1505def9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52830 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* lspcon_i2c_spi: Release I2C fd on failed initAngel Pons2021-05-091-0/+2
| | | | | | | | | | Change-Id: Idec3cd349ab8d6e2ebb0fafae70c5d69bb2c8880 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52829 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* i2c_helper_linux: Clean up whitespace a bitAngel Pons2021-05-091-2/+1
| | | | | | | | | | | Use tabs to indent code and drop an unnecessary newline. Change-Id: I8fe4a8b9213677e0d0bee9681abf94726c934cc6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* realtek_mst_i2c_spi: Add missing bracesAngel Pons2021-05-091-8/+10
| | | | | | | | | | | | | As per the coding style, if one branch of a conditional statement needs braces, all other branches need to have braces as well. Change-Id: I69b762391165177857e9331f79f54b01149cf339 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52827 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* tests: Start port-i/o mocking frameworkNico Huber2021-05-071-0/+49
| | | | | | | | | | | | | | This will be used to mock the i/o needs of indvidiual programmer drivers. For each programmer driver, a `struct io_mock` can be registered to dispatch inb()/outb() and friends. Change-Id: I8df02832deba80761b57435244a29d0d9b4e2649 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* flashrom.8.tmpl: Add man entry for --extractDaniel Campello2021-05-071-1/+5
| | | | | | | | | | This is a follow up change of CB:52450 Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: Icc068f5545b6f30ac390b7b815a31e2d61bf4789 Reviewed-on: https://review.coreboot.org/c/flashrom/+/52892 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* programmer.h: Convert anon union to anon structEdward O'Callaghan2021-05-074-4/+5
| | | | | | | | | | | | | | | | | | | | | | | Convert the anon union of registered masters in the mst field of the flashctx to a anon struct. If we are going to dereference a pointer there in an undefined way we should crash and not plow ahead with invalid memory. The user of the registered_masters type is therefore responsible for querying the buses_supported field before attempting to dereference a ptr field in the anon struct. BUG=b:175849641 TEST=`flashrom -p internal --flash-name` Change-Id: I576967a8599b923c902e39f177f39146291cc242 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/50246 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Daniel Campello <campello@chromium.org> Reviewed-by: Sam McNally <sammc@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* CHROMIUM: flashrom_tester: Remove --ignore-fmap optionDaniel Campello2021-05-062-10/+3
| | | | | | | | | | | | | | | | | This change removes --ignore-fmap as this is implicitly computed based on other supplied options by the user. Original-Signed-off-by: Daniel Campello <campello@chromium.org> Original-Cq-Depend: chromium:2854174, chrome-internal:3789445, chromium:2854014 Original-Change-Id: I841a56d8726644cedd7d616ddfd5656b92dd7e59 Original-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2851658 Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> (cherry picked from commit 2e2a5e449229e9c9604235a98b56e5dd29bf25cf) Change-Id: Ib329f3adb59ce1848d1540844d64b968f49eb22a Reviewed-on: https://review.coreboot.org/c/flashrom/+/52890 Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* CHROMIUM: flashrom_tester: Drop nix dependencyChirantan Ekbote2021-05-062-7/+13
| | | | | | | | | | | | | | | | | | | | | | We can just use the libc functions directly. This is exactly what nix does anyway. BUG=none TEST=unit tests BRANCH=none Original-Change-Id: I45c02f0c71d164bd8f504fe2b8d3acd54e0d5704 Original-Signed-off-by: Chirantan Ekbote <chirantan@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2560393 Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Original-Reviewed-by: Allen Webb <allenwebb@google.com> Original-Commit-Queue: Allen Webb <allenwebb@google.com> (cherry picked from commit 1ba7dbe83e01d270b6d8d597a079ea3bfeb2117e) Change-Id: Iea61c65efb04da9cd0bc0bd85a34fc10912ea87b Reviewed-on: https://review.coreboot.org/c/flashrom/+/52889 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* flashrom_tester: update syntax for --wp-rangeDaniel Campello2021-05-061-5/+4
| | | | | | | | | | | TEST=cargo test Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: If17a40fba1f7d41e09e0163b353d1602c215c8db Reviewed-on: https://review.coreboot.org/c/flashrom/+/52876 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* cli_classic.c: implement set_wp_region operationDaniel Campello2021-05-043-0/+31
| | | | | | | | | | set_wp_region allows to set the wp_range based on a layout region. Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: Ibad68a038ab38b9986b0d8b5f5eb6c73b20ef381 Reviewed-on: https://review.coreboot.org/c/flashrom/+/52531 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* cli_classic.c: reorder writeprotect operation processingDaniel Campello2021-05-041-61/+62
| | | | | | | | | | | Make sure that layout is set before. Also as the comment instructs make sure that set_rw_range happens before set_wp_enable. Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: I7480d3f947aaaf30093d056226fe0c402763efdc Reviewed-on: https://review.coreboot.org/c/flashrom/+/52530 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* cli_classic.c: add -x option for do_extract()Daniel Campello2021-05-025-4/+39
| | | | | | | | | | | | | | This change introduces a new option to extract all layout regions to files with the name of each region (or with the provided filename via -i region:file). It is implemented by mutating the flash layout to include all regions and backfilling the entry->file with entry->name (replacing spaces with underscores) Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: I8c69223fa92cf5b50abe070f1ab9f19d3b42f6ff Reviewed-on: https://review.coreboot.org/c/flashrom/+/52450 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* lspcon_i2c_spi: support a devpath optionPeter Marheine2021-05-023-52/+80
| | | | | | | | | | | | | | | | | | | | | | Some callers may find it easier to provide the path to an I2C device at which to communicate with the device, rather than specify the bus number- doing so might involve trying to parse a path to extract the number only for flashrom to do the reverse, which is error-prone and unnecessary. This change adds support for a `devpath` option, continuing to allow `bus` and requiring only one of them be specified. TEST=Verified --flash-size outputs correct values with both devpath=/dev/i2c-7 and bus=7, as well as noting that one is required if neither is specified and only one may be specified if both are given. Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: Id2adf8a307b9205ce5e5804a6c3e22f19d0c34c9 Reviewed-on: https://review.coreboot.org/c/flashrom/+/51967 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashrom.c: allow - as filename for stdinDaniel Campello2021-04-292-5/+11
| | | | | | | | | | | | Allows - as filename for -w/-v options. It is sometimes useful to script flashrom and allowing it to work with pipes allows for more flexibility in this specific use-case. Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: I97889cfdf7ba9a257e182c4ee2b20075cfa58d4d Reviewed-on: https://review.coreboot.org/c/flashrom/+/52383 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* ene_lpc.c: Untangle successful vs failed init pathsAnastasia Klimchuk2021-04-291-15/+14
| | | | | | | | | | | | | | | | | | Exit label now serves as failed init path, it does cleanup and returns 1, so it is renamed into init_err_exit. Since all error paths return 1, and successful init is separated from failure, there is no need to have ret variable anymore. BUG=b:185191942 TEST=builds Change-Id: Iac295f1353785cd73d7cb2f19e4a8cbb69beb576 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52685 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mec1308.c: Ensure programmer param variable is always initialisedAnastasia Klimchuk2021-04-281-3/+1
| | | | | | | | | | | | | | Programmer param variable is now declared inline with the code and is const, so that it cannot be used uninitialised. BUG=b:185191942 TEST=builds and ninja test from 51487 Change-Id: I2d2b3039da2ef185cb31509b3901d56b428688b7 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52719 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* ene_lpc.c: Extract params check into a functionAnastasia Klimchuk2021-04-281-5/+14
| | | | | | | | | | | | | | | | | | | | This allows char *p to become a local variable in check_params, and it is allocated and freed within check_params function. Which means init function does not need char *p anymore, in particular does not need to free it - and this makes cleanup after failed init easier. As a good side effect, init function becomes easier to read. BUG=b:185191942 TEST=builds Change-Id: I7c3b6dea0edbc7547f0b307a0508c7d2b2a6d370 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52684 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* layout: Add -i <region>[:<file>] supportDaniel Campello2021-04-276-37/+234
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an optional sub-parameter to the -i parameter to allow building the image to be written from multiple files. This will also allow regions to be read from flash and written to separate image files. This is a rebase of a patch that was ported from chromiumos. A lot of things have changed, but the idea is the same. Original patch by Louis Yung-Chieh Lo <yjlou@chromium.org>: Summary: Support -i partition:file feature for both read and write. Commit: 9c7525f Review URL: http://codereview.chromium.org/6611015 Ported version by Stefan Tauner <stefan.tauner@student.tuwien.ac.at> and Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>: Summary: [PATCH 2/6] layout: Add -i <region>[:<file>] support. Review URL: https://mail.coreboot.org/pipermail/flashrom/2013-October/011729.html Change-Id: Ic5465659605d8431d931053967b40290195cfd99 Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Nico Huber <nico.huber@secunet.com> Signed-off-by: Edward O'Callaghan <quasisec@google.com> Signed-off-by: Daniel Campello <campello@chromium.org> Co-Authored-by: Edward O'Callaghan <quasisec@google.com> Co-Authored-by: Daniel Campello <campello@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/23021 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* hwaccess.h: Split hwaccess.h and extract hwaccess_x86_io.h out of itAnastasia Klimchuk2021-04-272-136/+157
| | | | | | | | | | | | | | | | | | The change makes it possible to mock functions from hwaccess_x86_io.h in tests by replacing this header with a different one when built for a test environment. The rest of hwaccess.h is fine and works for the test environment. BUG=b:181803212 TEST=make clean && make CONFIG_EVERYTHING=yes VERSION=none Build flashrom before and after this patch, flashrom binary is the same (diff flashrom_before flashrom_after shows no diffs) Change-Id: Idd04c7b36b24e9da339348a015df4f43a03744f7 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52499 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* tests: Add unit test to run init/shutdown for linux_spi.cAnastasia Klimchuk2021-04-274-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation tests a particular path of the init procedure. There are two ways for it to succeed: reading the buffer size from sysfs and the fallback to getpagesize(). This test does the latter (fallback to getpagesize). Extract from meson-logs/testlog.txt for new test: [ RUN ] linux_spi_init_and_shutdown_test_success Testing programmer_init for programmer=25 ... __wrap_open64 is called __wrap_ioctl is called __wrap_ioctl is called __wrap_ioctl is called __wrap_fopen64 is called ... programmer_init for programmer=25 successful Testing programmer_shutdown for programmer=25 ... ... programmer_shutdown for programmer=25 successful [ OK ] linux_spi_init_and_shutdown_test_success BUG=b:181803212 TEST=builds and ninja test Change-Id: I4911fbb6f04371283f0e62d2196bdd691a227584 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52498 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* tests: Add unit test to run init/shutdown for dummyflasher.cAnastasia Klimchuk2021-04-274-0/+46
| | | | | | | | | | | | | | | | Introduce test to exercise that init and shutdown of drivers correctly manage the drivers life-time state. We constrain ourselves to dummyflasher in particular here as it does not need any mocking. BUG=b:181803212 TEST=builds and ninja test Change-Id: I3c0ef73397f00c1db7aabb5f9f00cb43525af29c Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52497 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* tests: Add logging to STDOUT when __wrap function is calledAnastasia Klimchuk2021-04-271-2/+7
| | | | | | | | | | | | | | | Calls to __wrap functions are now logged to stdout, makes it easier to understand what’s happening, really helps when writing tests (and can be useful when debugging tests). TEST=builds and ninja test BUG=b:181803212 Change-Id: Ifcef55c9cdb7756c38dcc44fdc57cd88c3d65e70 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52496 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* mec1308.c: Separate shutdown from failed init cleanupAnastasia Klimchuk2021-04-271-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Shutdown function was covering two different jobs here: 1) the actual shutdown which is run at the end of the driver's lifecycle and 2) cleanup in cases when initialisation failed. Now, shutdown is only doing its main job (#1), and the driver itself is doing cleanup when init fails (#2). The good thing is that now resources are released/closed immediately in cases when init fails (vs shutdown function which was run at some point later), and the driver leaves clean space after itself if init fails. And very importantly this unlocks API change which plans to move register_shutdown inside register master API, see https://review.coreboot.org/c/flashrom/+/51761 TEST=builds and ninja test from 51487 BUG=b:185191942 Change-Id: I6d62d43dd8b6ebc595f9fd747e0f4cd80f3c10da Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* mec1308.c: Untangle successful vs failed init pathsAnastasia Klimchuk2021-04-271-27/+16
| | | | | | | | | | | | | | | | | Label mec1308_init_exit now serves as failed init path, it does cleanup and returns 1, so it is renamed into init_err_exit. Since all error paths return 1, and successful init is separated from failure, there is no need to have ret variable anymore. TEST=builds and ninja test from 51487 BUG=b:185191942 Change-Id: Ibf35335501e59636c544af124ad7a04a186790b4 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* mec1308.c: Extract params check into a functionAnastasia Klimchuk2021-04-271-5/+16
| | | | | | | | | | | | | | | | | | | | This allows char *p to become a local variable in check_params, and it is allocated and freed within check_params function. Which means init function does not need char *p anymore, in particular does not need to free it - and this makes cleanup after failed init easier. As a good side effect, init function becomes easier to read. TEST=builds and ninja test from 51487 BUG=b:185191942 Change-Id: If5be7709e93233a2e7ea9133de50382d2524a55f Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52595 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* jlink_spi.c: Drop jaylink_ prefix for spi data struct membersAnastasia Klimchuk2021-04-271-31/+31
| | | | | | | | | | | | | | | | | | Since jaylink context and jaylink device handle are not global variables anymore, but members of the struct jlink_spi_data, jaylink_ prefix can be dropped from members names and moved to struct variable name. Follow up on 52560. BUG=b:185191942 TEST=builds Change-Id: If6e68e0dabb6bfad1088ff975445961294bbc03d Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Tested-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Miklós Márton <martonmiklosqdev@gmail.com>
* chipset_enable.c: Add IDs for H310C and B365 PCHsAngel Pons2021-04-271-0/+2
| | | | | | | | | | | | | | | | | The device ID for H310C can be found in Intel document 335192-004, but the device ID for B365 is not there. Other sites list these IDs: https://linux-hardware.org/index.php?id=pci:8086-a2ca-1462-7c09 (H310C) https://linux-hardware.org/index.php?id=pci:8086-a2cc-1849-a2cc (B365) Both of these PCHs have been tested as well. Change-Id: If9f0a49a0f1821e5592213e07962ee48654cdc07 Tested-by: Timofey Komarov <happycorsair@yandex.ru> Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52605 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* chipset_enable.c: Add CMP-H IDsGaggery Tsai2021-04-261-0/+7
| | | | | | | | | | | | | | | | | This patch adds CMP-H support. They are HM470, WM490, QM480, W480, H470, Z490 and Q470. TEST=build flashrom and run on CML-S with CMP-H flashrom -p internal -w ./coreboot.rom reboot and check the code is flashed correctly Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Change-Id: Ic7f04fc5cbe3422cbd219c46586c32fc847c921f Reviewed-on: https://review.coreboot.org/c/flashrom/+/37677 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Crawford <tcrawford@system76.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashchips: Add MX25L3233FNico Huber2021-04-252-3/+3
| | | | | | | | | | | | Only mattering difference to the MX25L3273E seems to be the voltage range (starting at 2.65V instead of 2.7V). I don't think that would justify yet another entry. Change-Id: I73402dddedf360ab84caed4c019efe27b477d4c2 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52570 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashchips: Correct OTP comment for MX25L3273ENico Huber2021-04-251-1/+1
| | | | | | | | | | The datasheet says 4K bits, maybe just a copy-paste error. Change-Id: I42b10aa09c969e5c5e7102b1e8ab496f52bd27bb Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashchips: Add support for Boya/BoHong Microelectronics B_25D16AChristian Kudera2021-04-242-0/+39
| | | | | | | | | | Read tested on CH341A Change-Id: I25b776204affda94cc7e753e7671ef9d3d9508f1 Signed-off-by: Christian Kudera <coreboot@kudera.at> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52555 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashchips: Adapt IDs for Boya MicroelectronicsAngel Pons2021-04-242-7/+7
| | | | | | | | | | | | Looks like BoHong Microelectronics has the same vendor ID and makes very similar chips. For instance, Boya BY25Q128AS and BoHong BH25Q128AS have the same specifications and their datasheets are mostly identical. Change-Id: I8d6951797daeeecca6af200c995297c0394adefd Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52550 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* s25f.c: Fix mismatched function definitionsAngel Pons2021-04-241-4/+2
| | | | | | | | | | | | | This was missed because `uint32_t` is `unsigned int` in most cases. However, it is not the case for DJGPP 6.1.0 for some reason. Tested with manibuilder, solves some build errors on the DJGPP target. Change-Id: I656a72b85d4c70b57f6ff9268186a4a60933f8a9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52473 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-02 17:29:52 +0000