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path: root/chipset_enable.c
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* Print found PCI IDs during chipset detectionCarl-Daniel Hailfinger2010-05-221-0/+3
* Disable probing for one variant of MCP55 to enable Tyan S2915Carl-Daniel Hailfinger2010-05-221-1/+9
* Convert various prints to use msg_p* and msg_g* respectivelySean Nelson2010-05-071-108/+108
* Rename identifiers called 'byte'Michael Karcher2010-02-251-14/+14
* Refactor MCP SPI detectionCarl-Daniel Hailfinger2010-02-181-54/+101
* Add SPI mode diagnostics for all post-MCP55 (nForce 5) chipsets from NvidiaCarl-Daniel Hailfinger2010-02-131-1/+137
* Add Intel NM10 chipset enableDavid Hendricks2010-01-191-0/+1
* Don't use "byte" as identifierMichael Karcher2010-01-121-11/+11
* Chipset: Fix sis5x0 register write verificationLuc Verhaegen2010-01-101-13/+3
* Fix Intel FWH decode sizeMichael Karcher2010-01-031-2/+2
* Add VIA VT8233A identification, mark as testedRaúl Soriano2009-12-231-0/+1
* Chipset/Board: vt8237: Set All mem cycles to LPC in chipset enableLuc Verhaegen2009-12-231-0/+7
* Chipset: Add support for Intel Poulsbo chipsetAdam Jurkowski2009-12-211-0/+22
* Use the maximum decode size infrastructureCarl-Daniel Hailfinger2009-12-171-27/+96
* Internal (onboard) programming was the only feature which could not be disabledCarl-Daniel Hailfinger2009-12-131-21/+0
* Chipset: remove sis630 chipset enable for sis540Luc Verhaegen2009-12-091-51/+17
* Intel PIIX* chipsets only support parallel flash (no LPC/FWH/SPI)Maciej Pijanka2009-12-081-0/+2
* Add support for Intel 3400 series / 5 series chipsetCarl-Daniel Hailfinger2009-11-261-0/+3
* Mark Elitegroup K7S5A as supportedCarl-Daniel Hailfinger2009-11-151-28/+28
* Add support for every single SiS chipset out thereCarl-Daniel Hailfinger2009-11-151-67/+200
* Add infrastructure to check the maximum supported flash size of chipsets and ...Carl-Daniel Hailfinger2009-10-311-0/+11
* Mark NVIDIA Nforce4/MCP04 as testedLuc Verhaegen2009-10-061-1/+1
* Chipset support for the nVidia nForce 4Luc Verhaegen2009-10-051-0/+1
* Add chipset support for VIA VT82C596 by adding a PCI IDUwe Hermann2009-09-251-0/+1
* Enable flashrom on Wyse Winterm S50Nils Jacobs2009-09-231-0/+1
* Use correct name for SB700/SB710/SB750 instead of calling them SB700Carl-Daniel Hailfinger2009-09-011-1/+1
* Add support for ICH9 engineering sampleCarl-Daniel Hailfinger2009-08-211-0/+1
* Allow the user to override FWH IDSEL on ICH6 and laterCarl-Daniel Hailfinger2009-08-131-0/+14
* Fix up MSR handling to support more OSes than Linux. Stefan Reinauer2009-08-121-69/+13
* Make debug messages printf_debug(). Stefan Reinauer2009-08-111-15/+15
* Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decode settings to...Carl-Daniel Hailfinger2009-08-101-0/+36
* Remove unnecessary #include filesCarl-Daniel Hailfinger2009-08-091-2/+1
* This is a workaround for a bug in SB600 and SB700Carl-Daniel Hailfinger2009-07-231-7/+31
* Random minor flashrom fixesUwe Hermann2009-06-281-1/+1
* Print the bus type(s) of both chipset and chip in the flashrom outputUwe Hermann2009-06-281-0/+2
* Chipset enable for VIA VT8233Mateusz Murawski2009-06-181-0/+1
* Move all printing code to print.cUwe Hermann2009-06-171-26/+0
* List the size (in KB) and type of supported flash chips in 'flashrom -L'Uwe Hermann2009-06-161-3/+6
* The VIA VX800 chipset works with the VT8237S code after adding an entry for t...Arjan Koers2009-06-151-0/+1
* Mark 3COM "3C905B: Cyclone 10/100/BNC" as fully testedUwe Hermann2009-06-021-6/+6
* Only probe for chips with compatible bus protocolsCarl-Daniel Hailfinger2009-06-011-6/+17
* Add bus type annotation to struct flashchipsCarl-Daniel Hailfinger2009-05-311-10/+9
* Add NForce2 chipset enableLuc Verhaegen2009-05-261-0/+14
* A bunch of output beautifications and improvements, as well as doc fixesUwe Hermann2009-05-221-10/+16
* Use accessor functions for MMIOCarl-Daniel Hailfinger2009-05-171-35/+35
* List all boards which areUwe Hermann2009-05-161-19/+17
* Drop unused/duplicated #includes and some dead codeUwe Hermann2009-05-161-3/+0
* Uwe tested the recent SB600 SPI commit and notified me of one unexpected problemCarl-Daniel Hailfinger2009-05-151-1/+25
* Create a SB600 SPI detection heuristicCarl-Daniel Hailfinger2009-05-101-1/+38
* Make chipset list alphabetically ordered as the other listsUwe Hermann2009-05-081-39/+40