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* physmap: rename to hwaccess_physmap, create own headerThomas Heijligen2021-12-221-0/+1
| | | | | | | | | | Line up physmap with the other hwaccess related code. Change-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.c: Validate before allocate in verify_range()Edward O'Callaghan2021-12-151-10/+8
| | | | | | | | | | | | | | | Simplify a goto away for free'ing a buffer by validating before attempting to allocate. BUG=none TEST=builds Change-Id: Iae886f203d1c59ae9a89421f7483a4ec3f747256 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59372 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashrom.c: Delete obsolete commentSimon Buhrow2021-11-071-1/+0
| | | | | | | | Change-Id: Ibd53fe34c05f87d7ecc0d6eee6463f9da3a174d4 Signed-off-by: Simon Buhrow <simon.buhrow@posteo.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58742 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Replace freenode referencesAngel Pons2021-07-211-8/+8
| | | | | | | | | | | | The flashrom project no longer uses freenode. To avoid having outdated man pages in the future, the contact methods are now listed in the wiki. Change-Id: I75e8f43c50dc4c3feede0250334a877cdaac8103 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* flashrom.c: Reorder read_by_layout() to avoid forward declEdward O'Callaghan2021-07-161-27/+26
| | | | | | | | | | | | | | Help make groking flashrom.c fractionaly easier. BUG=none BRANCH=none TEST=builds Change-Id: Ifd6c152e3a1d84b59a876997e543127387f24d40 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* flashrom.c: Reorder check_block_eraser() to avoid forward declEdward O'Callaghan2021-07-161-27/+25
| | | | | | | | | | | | | | Help make groking flashrom.c fractionaly easier. BUG=none BRANCH=none TEST=builds Change-Id: I0906a6e581ce5135b58f6acc6339908dfa770a59 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56296 Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashrom.c: Make extract_param() static localEdward O'Callaghan2021-07-161-1/+1
| | | | | | | | | | | | | | | The function is only ever used within flashrom.c. BUG=none BRANCH=none TEST=builds Change-Id: I81f1cdb9df98c151201390edeb69c74defe7881f Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56295 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
* layout: Rework normalize_romentries() APINico Huber2021-06-261-1/+1
| | | | | | | | | | | | | | Rename it to layout_sanity_checks() as that is what it does and let it work on the currently active layout instead of the global layout. Change-Id: Ifae3480d4bd68c939c291f05734544e93f00306c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54285 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Drop `count` parameter of flashrom_layout_new()Nico Huber2021-06-261-1/+1
| | | | | | | | | | Change-Id: I22c180c9971068b1ae101845ce88484c6842b852 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33544 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Pass layout directly to verify_by_layout()Nico Huber2021-06-261-11/+11
| | | | | | | | | | | | | | | It used the current layout from the flash context, before. This made it necessary to replace the pointer on-the-fly. Passing the layout directly, works without that stunt. Change-Id: Id496deec85c18bdfe968df6a798b626eb9cfbed5 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33520 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Introduce flashrom_layout_new()Nico Huber2021-06-261-8/+5
| | | | | | | | | | | | | | | | | It initializes an empty layout. Currently the maximum number of entries has to be specified, which will vanish once we use dynamic allocation per entry. We replace the two special cases `single_layout` and `ich_layout` with dynamically allocated layouts. As a result, we have to take care to release the `default_layout` in a flashctx once we are done with it. Change-Id: I2ae7246493ff592e631cce924777925c7825e398 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33543 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* layout: Introduce flashrom_layout_add_region()Nico Huber2021-06-261-8/+4
| | | | | | | | | | | | | Adds a region to an existing layout, as long as there is space. Change-Id: I50d473d0d5d1fb38bd6f9ae3d7127e9ea66a94e1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33517 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* layout: Add `capacity` fieldNico Huber2021-06-261-0/+1
| | | | | | | | | | | | | | Use it to keep track of the size of the `entries` array. An interim solution until we have dynamic allocation. Change-Id: Ib5f431bc0a72a79a53fa1376c3417942b19dd3a0 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33516 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* enum programmer: not needed anymore. RemoveThomas Heijligen2021-06-101-7/+0
| | | | | | | | | Change-Id: I53cdb160616911a4beea6b5e8e56d582621818a4 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55124 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* programmer_init: use struct programmer_entry*Thomas Heijligen2021-06-101-3/+3
| | | | | | | | Change-Id: Iacf0f25abc94a84c5d52c8d69a3e8640817b060a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55121 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.c libflashrom.c: replace enum programmer with size_tThomas Heijligen2021-06-101-1/+1
| | | | | | | | | | | Using size_t since programmer_table_size uses ARRAY_SIZE which returns size_t. Change-Id: Id2ad9630fbc41e98d182768b553788e069fa5095 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55120 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* flashrom.c: replace enum programmer with struct programmer_entry*Thomas Heijligen2021-06-101-12/+12
| | | | | | | | Change-Id: I478c56354d5f482010bfe1560489700bc889717a Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55119 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* programmer_table: replace PROGRAMMER_INVALID with programmer_table_sizeThomas Heijligen2021-06-101-4/+4
| | | | | | | | Change-Id: Icaaeefe001de604df9d7fdd06f05a5ed39fdbd84 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55117 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* treewide: Drop unnecessary uses of memset/memcpyAngel Pons2021-06-091-5/+3
| | | | | | | | | | Simply provide an initialiser or use a direct assignment instead. Change-Id: I07385375cd8eec8a95874001b402b2c17ec09e09 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55267 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* treewide: Drop most cases of `sizeof(struct ...)`Angel Pons2021-06-091-2/+2
| | | | | | | | | | | | | | | | Spelling out the struct type name hurts readability and introduces opportunities for bugs to happen when the pointer variable type is changed but the corresponding sizeof is (are) not. TEST=`make CONFIG_EVERYTHING=yes CONFIG_JLINK_SPI=no VERSION=none -j` with and without this patch; the flashrom executable does not change. Change-Id: Icc0b60ca6ef9f5ece6ed2a0e03600bb6ccd7dcc6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55266 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* programmer_table: convert entries to pointersThomas Heijligen2021-06-091-23/+28
| | | | | | | | | | Allows us to move the individual entries into their respective driver files. Change-Id: Ifbb0ee4db5a85b1cd2afeafe4dca838579f79878 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52945 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* programmer_table: move array content to an own fileThomas Heijligen2021-06-091-478/+0
| | | | | | | | Change-Id: I8e6d704e845ee4152c8676dd19dff0934fff007b Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52944 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* programmer_table: add table size constantThomas Heijligen2021-06-091-1/+3
| | | | | | | | | | | | Makes the array size known to other compilation units. Change-Id: Idacb4b7b0dd98af8bc7cbecf567d33daafb4b24d Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55116 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* programmer_table: remove null terminationThomas Heijligen2021-06-091-3/+1
| | | | | | | | | | | The {0} object at the end of programmer_table which corresponds to PROGRAMMER_INVALID has no use in current code. Change-Id: Ib63c2d2941f23a0788e26e5a5feb25d8669acb42 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55115 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* cli_classic.c: add -x option for do_extract()Daniel Campello2021-05-021-0/+6
| | | | | | | | | | | | | | This change introduces a new option to extract all layout regions to files with the name of each region (or with the provided filename via -i region:file). It is implemented by mutating the flash layout to include all regions and backfilling the entry->file with entry->name (replacing spaces with underscores) Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: I8c69223fa92cf5b50abe070f1ab9f19d3b42f6ff Reviewed-on: https://review.coreboot.org/c/flashrom/+/52450 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* flashrom.c: allow - as filename for stdinDaniel Campello2021-04-291-2/+6
| | | | | | | | | | | | Allows - as filename for -w/-v options. It is sometimes useful to script flashrom and allowing it to work with pipes allows for more flexibility in this specific use-case. Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: I97889cfdf7ba9a257e182c4ee2b20075cfa58d4d Reviewed-on: https://review.coreboot.org/c/flashrom/+/52383 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* layout: Add -i <region>[:<file>] supportDaniel Campello2021-04-271-1/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an optional sub-parameter to the -i parameter to allow building the image to be written from multiple files. This will also allow regions to be read from flash and written to separate image files. This is a rebase of a patch that was ported from chromiumos. A lot of things have changed, but the idea is the same. Original patch by Louis Yung-Chieh Lo <yjlou@chromium.org>: Summary: Support -i partition:file feature for both read and write. Commit: 9c7525f Review URL: http://codereview.chromium.org/6611015 Ported version by Stefan Tauner <stefan.tauner@student.tuwien.ac.at> and Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>: Summary: [PATCH 2/6] layout: Add -i <region>[:<file>] support. Review URL: https://mail.coreboot.org/pipermail/flashrom/2013-October/011729.html Change-Id: Ic5465659605d8431d931053967b40290195cfd99 Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Nico Huber <nico.huber@secunet.com> Signed-off-by: Edward O'Callaghan <quasisec@google.com> Signed-off-by: Daniel Campello <campello@chromium.org> Co-Authored-by: Edward O'Callaghan <quasisec@google.com> Co-Authored-by: Daniel Campello <campello@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/23021 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* flashrom.c: Fix up stale FIXME comment when doit() was removedEdward O'Callaghan2021-04-201-2/+2
| | | | | | | | | | | | | | | | | Once upon a time flashrom had a entry point function called doit(). Excise the last mention of it here so that we may never mention it again. BUG=none TEST=none Change-Id: I40d815b7154456c323b4230cd3fed2cc2e8e3641 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52365 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashrom.c: implement chip restore callback registrationNikolai Artemiev2020-12-031-0/+30
| | | | | | | | | | | | | | | | | | | | Allows drivers to register a callback function to reset the chip state once programming has finished. This is used by the s25f driver added in a later patch, which needs to change the chip's sector layout to be able to write to the entire flash. Adapted from cros flashrom at `9c4c9a56b6a0370b383df9c75d71b3bd469e672d`. BUG=b:153800073 BRANCH=none TEST=builds Change-Id: I2a522dc1fd3952793fbcad70afc6dd43850fbbc5 Signed-off-by: Nikolai Artemiev <nartemiev@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/47276 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* flashrom.c: Correct "raiden_debug_spi" drv nameEdward O'Callaghan2020-11-301-1/+1
| | | | | | | | | | | | | | | Unfortunately raiden_debug was upstreamed with a slightly incorrect name of "raiden_debug" whereas in ChromiumOS it is known as "raiden_debug_spi" and so correct this to align. This avoids confusion and divergence for a unified future. Change-Id: I0eca35863403c5d4adbe19b31801e8dfa072006f Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/48106 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* raiden_debug: Rename with '_DEBUG_SPI' suffixEdward O'Callaghan2020-11-281-1/+1
| | | | | | | | | | | | Unfortantly raiden_debug was upstreamed with a misnaming of the CONFIG_ make param that introduces unnecessary divergence. Rename to 'CONFIG_RAIDEN_DEBUG_SPI' as-is downstream. Change-Id: I07c03647c329286bb223e4dae4665704e508db2c Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/48105 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* flashrom.c,flash.h: Kill dead fn shutdown_free()Edward O'Callaghan2020-10-241-6/+0
| | | | | | | | | | | | | | Seems to be dead code with no call sites. BUG=none BRANCH=none TEST=builds Change-Id: Ic9f33415b8a357916891cb2006612cbf5e6aa559 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/46546 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* Add MEC1308 EC programmerVictor Ding2020-08-201-0/+12
| | | | | | | | | | | | | Initial support of Microchip MEC1308 Embedded Controller. BUG=b:156144893 BRANCH=none Signed-off-by: Victor Ding <victording@google.com> Change-Id: I2d51b4bdc0b38b6e488e71b9e774eb6232a2069e Reviewed-on: https://review.coreboot.org/c/flashrom/+/44541 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Add ENE LPC programmerVictor Ding2020-08-201-0/+12
| | | | | | | | | | | | | | Initial support of ENE LPC interface keyboard controller. BUG=b:156140422 BRANCH=none Signed-off-by: Victor Ding <victording@google.com> Change-Id: I970afd8c1bd92c159c60e09f22e2f18c0433729d Reviewed-on: https://review.coreboot.org/c/flashrom/+/44580 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Initial Realtek MST i2c_spi supportEdward O'Callaghan2020-05-041-0/+12
| | | | | | | | | | | | | | | | | | | | | This spi master allows for programming of a Realtek RTD2142 MST with external SPI flash chip routed via its internal i2c transport mechanism. BUG=b:152558985,b:148745673 BRANCH=none TEST=echo "00000000:0004ffff fw" > layout && \ flashrom -p realtek_mst_i2c_spi:bus=8 -l layout -i fw:dump.bin -r && \ flashrom -p realtek_mst_i2c_spi:bus=8 -l layout -i fw:dump.bin -w && \ flashrom -p realtek_mst_i2c_spi:bus=8 --flash-size && \ flashrom -p realtek_mst_i2c_spi:bus=8 --flash-name Change-Id: I892e0be776fe605e69fb39c77abf3016591d7123 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40667 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Shiyu Sun <sshiyu@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Revert "flashchips: port S25FS(128S) chip from chromiumos"Nico Huber2020-05-011-25/+0
| | | | | | | | | | | | | | | | | | | | | This reverts commit a3519561bd0fb44153bb376322b799000657576f. Breaks support for most SPI flash chips. It's too big and too invasive to be reviewed as a single commit. The changes to `spi_poll_wip():spi25.c` were not noticed in the original review that were from the similarly named function and file `s25f_poll_status():s25f.c` in the downstream Chromium fork. V.2: Rebase and rephrase commit msg to reflect how the issue slipped in. Change-Id: Id2a4593bdb654f8a26957d69d52189ce61621d93 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40626 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shiyu Sun <sshiyu@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* flashchips: port S25FS(128S) chip from chromiumossibradzic2020-04-221-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This may seem too big just to support yet another flash chip, but in reality it brings support for whole new family of S25FS Spansion/Cypress flash chips. These chips require handling of some special status registers for erasing or writing, with very specific timing checks in place. For example, WIP status bit will remain being set to 1 if erase or programming errors occur, and in that case chip 'software reset' has to be performed otherwise the chip will remain unresponsive to all further commands. Also, special CR3NV register (Configuration Register 3 Nonvolatile) status bits needs to be read and set by using RDAR (ReaD Any Register) and WRAR (WRite Any Register) OP commands, and these states are needed to determine which type of reset feature is enabled at the time (legacy or S25FS type) in the first place, determine whether Uniform or Hybrid sector architecture is used at the time, or set programming buffer address wrap point (256 or 512 bytes). Furthermore, S25FS chip status register has to be restored to its original state (hence that ugly CHIP_RESTORE_CALLBACK) following erasing or writing, failing to do so may result in host being unable to access data on the chip at all. Finally, although this brings support for the whole family of chips, I only have one such chip to do the actual testing, S25FS128S (Small Sectors), which I had fully tested on ch341a and FT4232H programmers, with confirmed working probe, read, erase and write. Full summary of changes are here: flashchips: add new flashchip sctructure property: .reset add chip definitions: S25FS128S Large Sectors S25FS128S Small Sectors flash: add macro (chip_restore_func_data call-back): CHIP_RESTORE_CALLBACK flashrom: add struct: chip_restore_func_data add call-back function: register_chip_restore spi: add OP codes: CMD_RDAR, CMD_WRAR, CMD_WRAR_LEN, CMD_RSTEN, CMD_RST add register bit function definitions: CR3NV_ADDR, CR3NV_20H_NV add timers: T_W, T_RPH, T_SE spi25: refactor (based on chromiumos implementation) function: spi_poll_wip port these functions from chromiumos: probe_spi_big_spansion s25fs_software_reset s25f_legacy_software_reset s25fs_block_erase_d8 spi25_statusreg: port these functions from chromiumos: spi_restore_status s25fs_read_cr s25fs_write_cr s25fs_restore_cr3nv Most of the ported functions are originally from s25f.c found at https://chromium.googlesource.com/chromiumos/third_party/flashrom with exception of spi_restore_status which is defined in spi25_statusreg.c. The rest of macros and OP codes are defined in same files as in this commit. Change-Id: If659290874a4b9db6e71256bdef382d31b288e72 Signed-off-by: Samir Ibradzic <sibradzic@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39822 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* lspcon_i2c_spi.c: Add SPI-master support for PS17{5,6}Shiyu Sun2020-04-011-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | This adds support for the Parade lspcon usb-c to HDMI protocol translater part that is i2c-controlled. The support allows the host to reach the SPI ROM that hangs off the part where it stores its firmware. Usage is as follows: flashrom -p lspcon_i2c_spi:bus=X where X is the bus number. BUG=b:148746232 BRANCH=none TEST=tested with following commands, read/write/erase works good. flashrom -p lspcon_i2c_spi:bus=7 -r /tmp/foo; flashrom -p lspcon_i2c_spi:bus=7 -E; flashrom -p lspcon_i2c_spi:bus=7 -w /tmp/foo; Change-Id: I039e683252cfaf1ffef8694a3e8081b1b6b944f7 Signed-off-by: Shiyu Sun <sshiyu@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39687 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Fix segfault when running `flashrom -L`Angel Pons2020-03-261-1/+1
| | | | | | | | | | | | | | | | | | | | The raiden_debug programmer is of type USB. However, it does not set the field `devs.dev`, which will result in a segfault when trying to print the devices of the non-existing table. Fix that by replacing `devs.note` with `devs.dev` and adding an empty device table. Since Device IDs are not used to match programmers, nothing could be added to the table. TEST=Running `flashrom -L` no longer segfaults and returns normally. Change-Id: Ie4171a11384c34abb102d1aadf86aa1b8829fc04 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* raiden_debug: Upstream ChromiumOS servo debug board progEdward O'Callaghan2020-03-031-0/+12
| | | | | | | | | | | | | | | | | | Initial check-in of the Raiden debugger programmer. Squash in, raiden_debug: Add missing .write_aai cb fn raiden_debug: greatly improve protocol documentation BUG=b:143389556 BRANCH=none TEST=builds Change-Id: Ifad273a708acea4de797a0808be58960635a8864 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/38209 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Add support for STLINK V3 debugger/programmer via its SPI bridgeMiklós Márton2019-12-311-0/+13
| | | | | | | | Change-Id: Icffab87ac8f2c570187ed753ec70f054541873a4 Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/34661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Add support for National Instruments USB-845x devicesMiklós Márton2019-11-141-0/+11
| | | | | | | | Change-Id: I9477b6f0193bfdf20bbe63421a7fb97b597ec549 Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/25683 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Fix -Wsign-compare troubleNico Huber2019-07-311-1/+1
| | | | | | | | | | | Mostly by changing to `unsigned` types where applicable, sometimes `signed` types, and casting as a last resort. Change-Id: I08895543ffb7a48058bcf91ef6500ca113f2d305 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/30409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
* tree: Remove unused functions with no prototypesJacob Garber2019-06-231-148/+0
| | | | | | | | | | | | | | | | | These functions are no longer used, or were never used in the first place. generate_testpattern() - Introduced in commit eaac68bf8b, never used list_programmers() - Introduced in commit 552420b0d6, never used pci_dev_find_filter() - Prototype removed in commit 5c316f9549 erase_chip_jedec() - Usage and prototype removed in commit f52f784bb3 printlock_regspace2_blocks() - Introduced in commit ef3ac8ac17, never used spi_write_status_enable() - Usage dropped in commit fcbdbbc0d4 Change-Id: I742164670521fea65ffa3808446594848ce63cec Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33669 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* tree: Make internal functions staticJacob Garber2019-06-231-5/+4
| | | | | | | | | | | | None of these functions are used outside of the files they are defined in, so make them all static. Change-Id: Ie9cbe12d289bcedacf2f1bf483ae64ef8039ccc1 Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Nico Huber <nico.h@gmx.de>
* layout: Introduce layout_next_included()Nico Huber2019-06-171-21/+12
| | | | | | | | Change-Id: Ib01c8af06c3f84eafbd585760e74c3c287b9fa7d Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33518 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* layout: Make `romentry.name` a pointerNico Huber2019-06-171-1/+5
| | | | | | | | | | | This should provide more flexibility while we don't have to allocate 256B extra per layout entry. Change-Id: Ibb903113550ec13f43cbbd0a412c8f35fe1cf454 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33515 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* dediprog: Disable 4BA completelyv1.1-rc1Nico Huber2019-04-021-0/+10
| | | | | | | | | | | This is an interim solution. We'll have to enable 4BA step-by-step for each dediprog protocol version. Change-Id: I08efcbb09ab3499ef6902a698e9ce3d6232237c4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/30386 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* Fix verification with sparse layoutsNico Huber2019-04-021-9/+15
| | | | | | | | | | | | The full verification step was not accounting for sparse layouts. Instead of the old contents, combine_image_by_layout() implicitly assumed the new contents for unspecified regions. Change-Id: I44e0cea621f2a3d4dc70fa7e93c52ed95e54014a Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/30370 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
* Fix erasing of unaligned regionsNico Huber2019-03-041-3/+66
| | | | | | | | | | | | | | | | | | The erase (-E) feature is somehow a brute force method, but still, if we are given a region to erase, we should make sure to restore surrounding data if the erase block expands beyond the region. It shares a lot of code with the write path. Though, experiments with common functions have shown that it would make the whole function even harder to read. Maybe we could add some abstraction if we ever need similar code on a third path. Change-Id: I5fc35310f0b090f218cd1d660e27fb39dd05c3c5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/31068 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-03 05:02:27 +0000