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* programmer_table: move each entry to the associated programmer sourceThomas Heijligen2021-06-101-1/+11
| | | | | | | | | Change-Id: I3d02bd789f0299e936eb86819b3b15b5ea2bb921 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* treewide: Drop most cases of `sizeof(struct ...)`Angel Pons2021-06-091-1/+1
| | | | | | | | | | | | | | | | Spelling out the struct type name hurts readability and introduces opportunities for bugs to happen when the pointer variable type is changed but the corresponding sizeof is (are) not. TEST=`make CONFIG_EVERYTHING=yes CONFIG_JLINK_SPI=no VERSION=none -j` with and without this patch; the flashrom executable does not change. Change-Id: Icc0b60ca6ef9f5ece6ed2a0e03600bb6ccd7dcc6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55266 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* programmer: Make use of new register_spi_master() APINico Huber2021-05-131-3/+2
| | | | | | | | | | | Pass pointers to dynamically allocated data to register_spi_master(). This way we can avoid some mutable globals. Change-Id: Id7821f1db3284b7b5b3d0abfd878b979c53870a1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* programmer: Smoothen register_spi_master() APINico Huber2021-05-131-1/+1
| | | | | | | | | | | | | It was impossible to register a const struct spi_master that would point to dynamically allocated `data`. Fix that so that we won't have to create more mutable globals. Change-Id: I0c753b3db050fb87d4bbe2301a7ead854f28456f Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54066 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* lspcon_i2c_spi: Extract I2C bus parameter handlingAngel Pons2021-05-091-61/+1
| | | | | | | | | | | | Introduce the `i2c_open_from_programmer_params` function to avoid having to duplicate parameter parsing code on all I2C programmers. This also allows having the same programmer parameters on all I2C programmers. Change-Id: I006b311c88feea37fe4b217f769b21ca1505def9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52830 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* lspcon_i2c_spi: Release I2C fd on failed initAngel Pons2021-05-091-0/+2
| | | | | | | | | | Change-Id: Idec3cd349ab8d6e2ebb0fafae70c5d69bb2c8880 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52829 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* lspcon_i2c_spi: support a devpath optionPeter Marheine2021-05-021-35/+51
| | | | | | | | | | | | | | | | | | | | | | Some callers may find it easier to provide the path to an I2C device at which to communicate with the device, rather than specify the bus number- doing so might involve trying to parse a path to extract the number only for flashrom to do the reverse, which is error-prone and unnecessary. This change adds support for a `devpath` option, continuing to allow `bus` and requiring only one of them be specified. TEST=Verified --flash-size outputs correct values with both devpath=/dev/i2c-7 and bus=7, as well as noting that one is required if neither is specified and only one may be specified if both are given. Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: Id2adf8a307b9205ce5e5804a6c3e22f19d0c34c9 Reviewed-on: https://review.coreboot.org/c/flashrom/+/51967 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* lspcon_i2c_spi.c: Rename PAGE_SIZE macroAngel Pons2021-04-191-8/+8
| | | | | | | | | | | This fixes building with musl libc on alpine:i386-v3.7. Change-Id: Ibd478f3fcd6b6803098035dbdc47f72f6ab3fa6b Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52469 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* lspcon_i2c_spi.c: Prefix with fn name instead of just 'Error:'Shiyu Sun2020-05-011-8/+12
| | | | | | | | | | | | | | | | | Replace log lines with the prefix formatter '%s: ..' and pass '__func__' to the printers so that errors are prefixed with the function from which they originated. BUG=b:154285774 BRANCH=none TEST=build success Change-Id: If3205d8e453cfcd37f725b4fd135fe1221c913c0 Signed-off-by: Shiyu Sun <sshiyu@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40901 Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* const'ify flashctx to align signatures with cros flashromEdward O'Callaghan2020-04-301-2/+2
| | | | | | | | | | | | | | | | The ChromiumOS flashrom fork has since const'ify flashctx in a few places. This aligns the function signatures to match with downstream to ease forward porting patches out of downstream back into mainline flashrom. This patch is minimum viable alignment and so feedback is welcome. Change-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* lspcon_i2c_spi.c: Trivial style fixEdward O'Callaghan2020-04-241-1/+1
| | | | | | | | | Change-Id: I0675b467d7b0d24626a336033668bf80bfeeb815 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40679 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
* lspcon_i2c_spi.c: Clean up some unnecessary indirectionEdward O'Callaghan2020-04-191-11/+7
| | | | | | | | | | | | | | | | | | Clean up some confusion of implicit copies by indirection. This allows the caller of register_spi_master() to have it's internal state in the expected way. Also add an error when the mpu reset fails on init. BUG=b:148746232,b:153027771,b:140394053 BRANCH=none TEST=builds Signed-off-by: Edward O'Callaghan <quasisec@google.com> Change-Id: I66ba4ffeb696309b8ad5b5ba58650630e8feefa9 Reviewed-on: https://review.coreboot.org/c/flashrom/+/40470 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* lspcon_i2c_spi.c: Add SPI-master support for PS17{5,6}Shiyu Sun2020-04-011-0/+505
This adds support for the Parade lspcon usb-c to HDMI protocol translater part that is i2c-controlled. The support allows the host to reach the SPI ROM that hangs off the part where it stores its firmware. Usage is as follows: flashrom -p lspcon_i2c_spi:bus=X where X is the bus number. BUG=b:148746232 BRANCH=none TEST=tested with following commands, read/write/erase works good. flashrom -p lspcon_i2c_spi:bus=7 -r /tmp/foo; flashrom -p lspcon_i2c_spi:bus=7 -E; flashrom -p lspcon_i2c_spi:bus=7 -w /tmp/foo; Change-Id: I039e683252cfaf1ffef8694a3e8081b1b6b944f7 Signed-off-by: Shiyu Sun <sshiyu@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39687 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>