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* raiden_debug_spi: Fix memleakPatrick Georgi2020-04-241-0/+3
| | | | | | | | | | | | Change-Id: I2701a8fbae63657edc9cc258666cc951f92b1115 Found-by: Coverity Scan #1420204 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40650 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Fix segfault when running `flashrom -L`Angel Pons2020-03-261-0/+5
| | | | | | | | | | | | | | | | | | | | The raiden_debug programmer is of type USB. However, it does not set the field `devs.dev`, which will result in a segfault when trying to print the devices of the non-existing table. Fix that by replacing `devs.note` with `devs.dev` and adding an empty device table. Since Device IDs are not used to match programmers, nothing could be added to the table. TEST=Running `flashrom -L` no longer segfaults and returns normally. Change-Id: Ie4171a11384c34abb102d1aadf86aa1b8829fc04 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
* raiden_debug_spi.c: Add a delay following AP/EC flash enableEdward O'Callaghan2020-03-111-0/+9
| | | | | | | | | | | | | | | Add a delay following the AP and EC flash enable requests. This allows any power rails enabled by these signals to settle and to meet the power on to first SPI write timing requirements. Forward ports the downstream commit: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2036738 Change-Id: I4c1777777ee67580605c6e6f4c0c228cccc392c7 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39312 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* raiden_debug_spi.c: Disable retry during some error codesEdward O'Callaghan2020-03-111-0/+40
| | | | | | | | | | | Forward ports the downstream commit: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2073077 Change-Id: I77def28040fea8d1ecf102463180378f8612b00e Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39311 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* raiden_debug_spi.c: Implement retry mechanismEdward O'Callaghan2020-03-111-8/+42
| | | | | | | | | | | | | | | | | | | This overcomes a problem with the ServoMicro where USB packets can be ack'd by the device without triggering interrupts or loading data into the USB endpoints. The retry mechanism attempts the USB read 3 times before reattempting the write call to avoid performing multiple SPI transfers due to a USB problem. This process repeats 3 times before we return the last error code. Intermediary problems are reported in the status code. Based off the downstream commit: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2038271 Change-Id: I76cde68852fa4963582d57c7dcb9f24de32c6da8 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39310 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* raiden_debug_spi.c: Clean up RW ops into sep pathsEdward O'Callaghan2020-03-111-25/+71
| | | | | | | | | | | | | | | - The USB SPI interface has been split up into write and read stages. - The packet packing has been transitioned from array based to a struct. This was based off the downstream commit: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2036508 Change-Id: Id3a2a544c1c7e1d969a5157977b8a1c7af18371b Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39309 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* raiden_debug_spi.c: Fix indents to be consistentEdward O'Callaghan2020-03-111-40/+40
| | | | | | | | Change-Id: I414d6e5fcb590a006dd53fa93df80ec2a765c5d1 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/39308 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* raiden_debug: Upstream ChromiumOS servo debug board progEdward O'Callaghan2020-03-031-0/+449
Initial check-in of the Raiden debugger programmer. Squash in, raiden_debug: Add missing .write_aai cb fn raiden_debug: greatly improve protocol documentation BUG=b:143389556 BRANCH=none TEST=builds Change-Id: Ifad273a708acea4de797a0808be58960635a8864 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/38209 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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