From 65067c7d8e3c0ea0ca0bd7101a036748a272dfb0 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 6 Dec 2020 23:09:13 +0100 Subject: chipset_enable.c: Mark Intel H110 as DEP Tested reading, writing and erasing the internal flash chip using an HP 280 G2 SFF mainboard with an Intel H110 PCH. However, since ME-enabled chipsets are marked as DEP instead of OK, this one shall also be. Change-Id: I5deac6e43a43ee9748aaa7dadae50065613488b1 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/flashrom/+/48384 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Edward O'Callaghan --- chipset_enable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/chipset_enable.c b/chipset_enable.c index 9205d0e5e..040b151b0 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2022,7 +2022,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x0284, B_S, DEP, "Intel", "Comet Lake U Premium", enable_flash_pch400}, {0x8086, 0xa141, B_S, NT, "Intel", "Sunrise Point Desktop Sample", enable_flash_pch100}, {0x8086, 0xa142, B_S, NT, "Intel", "Sunrise Point Unknown Sample", enable_flash_pch100}, - {0x8086, 0xa143, B_S, NT, "Intel", "H110", enable_flash_pch100}, + {0x8086, 0xa143, B_S, DEP, "Intel", "H110", enable_flash_pch100}, {0x8086, 0xa144, B_S, NT, "Intel", "H170", enable_flash_pch100}, {0x8086, 0xa145, B_S, NT, "Intel", "Z170", enable_flash_pch100}, {0x8086, 0xa146, B_S, NT, "Intel", "Q170", enable_flash_pch100}, -- cgit v1.2.3