From 0facf12ca413adbe803c819f55938e41c440dde5 Mon Sep 17 00:00:00 2001 From: Nicholas Chin Date: Sun, 23 Oct 2022 13:10:31 -0600 Subject: ch347_spi: Add initial support for the WCH CH347 Add support for the WCH CH347, a high-speed USB to bus converter supporting multiple protocols interfaces including SPI. Currently only mode 1 (vendor defined communication interface) is supported, mode 2 (USB HID communication interface) support will be added later. The code is currently hard coded to use CS1 and a SPI clock of 15 MHz, though there are 2 CS lines and 6 other GPIO lines available, as well as a configurable clock divisor for up to 60MHz operation. Support for these will be exposed through programmer parameters in later commits. This currently uses the synchronous libusb API. Performance seems to be alright so far, if it becomes an issue I may switch to the asynchronous API. Tested with a MX25L1606E flash chip Signed-off-by: Nicholas Chin Change-Id: I31b86c41076cc45d4a416a73fa1131350fb745ba Reviewed-on: https://review.coreboot.org/c/flashrom/+/70573 Reviewed-by: Thomas Heijligen Tested-by: build bot (Jenkins) --- Makefile | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Makefile') diff --git a/Makefile b/Makefile index a7200dd6e..5283feae0 100644 --- a/Makefile +++ b/Makefile @@ -157,6 +157,7 @@ DEPENDS_ON_LIBPCI := \ DEPENDS_ON_LIBUSB1 := \ CONFIG_CH341A_SPI \ + CONFIG_CH347_SPI \ CONFIG_DEDIPROG \ CONFIG_DEVELOPERBOX_SPI \ CONFIG_DIGILENT_SPI \ @@ -521,6 +522,9 @@ CONFIG_IT8212 ?= yes # Winchiphead CH341A CONFIG_CH341A_SPI ?= yes +# Winchiphead CH347 +CONFIG_CH347_SPI ?= yes + # Digilent Development board JTAG CONFIG_DIGILENT_SPI ?= yes @@ -814,6 +818,11 @@ PROGRAMMER_OBJS += ch341a_spi.o ACTIVE_PROGRAMMERS += ch341a_spi endif +ifeq ($(CONFIG_CH347_SPI), yes) +FEATURE_FLAGS += -D'CONFIG_CH347_SPI=1' +PROGRAMMER_OBJS += ch347_spi.o +endif + ifeq ($(CONFIG_DIGILENT_SPI), yes) FEATURE_FLAGS += -D'CONFIG_DIGILENT_SPI=1' PROGRAMMER_OBJS += digilent_spi.o -- cgit v1.2.3