From d2d3993a25c3236d397209f9c2118c3b17ce4f95 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Fri, 18 Jan 2019 16:49:37 +0100 Subject: ichspi: Add Apollo Lake support It's almost identical to 100 series PCHs and later. There are some additional FREGs (12..15). To not clutter the `if` conditions further, make more use of `switch` statements. Tested on Kontron mAL10. Mark it as DEP as usually the last sector is not covered by the descriptor layout and can't be read. Change-Id: I1c464b5b3d151e6d28d5db96495fe874a0a45718 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/flashrom/+/30995 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- chipset_enable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'chipset_enable.c') diff --git a/chipset_enable.c b/chipset_enable.c index 24ac64a33..08feda52e 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2026,7 +2026,7 @@ const struct penable chipset_enables[] = { {0x8086, 0xa2c8, B_S, NT, "Intel", "B250", enable_flash_pch100}, {0x8086, 0xa2c9, B_S, NT, "Intel", "Z370", enable_flash_pch100}, {0x8086, 0xa2d2, B_S, NT, "Intel", "X299", enable_flash_pch100}, - {0x8086, 0x5ae8, B_S, BAD, "Intel", "Apollo Lake", enable_flash_apl}, + {0x8086, 0x5ae8, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, #endif {0}, }; -- cgit v1.2.3