From dbfa02911fe6f32503a574f84d1627a370cb7fc2 Mon Sep 17 00:00:00 2001 From: Carl-Daniel Hailfinger Date: Sun, 10 May 2009 14:11:07 +0000 Subject: Create a SB600 SPI detection heuristic I know that the data sheets say we can't read the ROM straps, but creative interpretation of the data sheets yielded a heuristic which should work pretty well. NOTE: If you test this, make sure you power down and _unplug_ the machine for a few minutes before you boot and run flashrom with this patch. If the machine is not unplugged for some time, the test will yield incorrect results. If you run a slightly older flashrom version than svn HEAD, the test will yield incorrect results. If you run any flashrom version (except svn HEAD plus this patch) after poweron, the test will yield incorrect results. Explanation: Older flashrom versions unconditionally write to registers which are used for this heuristic. These registers are in the S5 power domain, so even powering down does not clear them, you really have to unplug the machine and remove the battery if this is a laptop. Corresponding to flashrom svn r491. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Stefan Reinauer --- chipset_enable.c | 39 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) (limited to 'chipset_enable.c') diff --git a/chipset_enable.c b/chipset_enable.c index 4ba5bdad3..dff5d402f 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -660,6 +660,8 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name) { uint32_t tmp, prot; uint8_t reg; + struct pci_dev *smbus_dev; + int has_spi = 1; /* Clear ROM protect 0-3. */ for (reg = 0x50; reg < 0x60; reg += 4) { @@ -688,12 +690,47 @@ static int enable_flash_sb600(struct pci_dev *dev, const char *name) tmp &= 0xfffffff0; /* remove low 4 bits (reserved) */ printf_debug("SPI base address is at 0x%x\n", tmp); + /* If the BAR has address 0, it is unlikely SPI is used. */ + if (!tmp) + has_spi = 0; + /* Physical memory can only be mapped at page (4k) boundaries */ sb600_spibar = physmap("SB600 SPI registers", tmp & 0xfffff000, 0x1000); /* The low bits of the SPI base address are used as offset into the mapped page */ sb600_spibar += tmp & 0xfff; - flashbus = BUS_TYPE_SB600_SPI; + /* Look for the SMBus device. */ + smbus_dev = pci_dev_find(0x1002, 0x4385); + + if (!smbus_dev) { + fprintf(stderr, "ERROR: SMBus device not found. Not enabling SPI.\n"); + has_spi = 0; + } else { + /* Note about the bit tests below: If a bit is zero, the GPIO is SPI. */ + /* GPIO11/SPI_DO and GPIO12/SPI_DI status */ + reg = pci_read_byte(smbus_dev, 0xAB); + reg &= 0xC0; + printf_debug("GPIO11 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_DO"); + printf_debug("GPIO12 used for %s\n", (reg & (1 << 7)) ? "GPIO" : "SPI_DI"); + if (reg != 0x00) + has_spi = 0; + /* GPIO31/SPI_HOLD and GPIO32/SPI_CS status */ + reg = pci_read_byte(smbus_dev, 0x83); + reg &= 0xC0; + printf_debug("GPIO31 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_HOLD"); + printf_debug("GPIO32 used for %s\n", (reg & (1 << 7)) ? "GPIO" : "SPI_CS"); + if (reg != 0x00) + has_spi = 0; + /* GPIO47/SPI_CLK status */ + reg = pci_read_byte(smbus_dev, 0xA7); + reg &= 0x40; + printf_debug("GPIO47 used for %s\n", (reg & (1 << 6)) ? "GPIO" : "SPI_CLK"); + if (reg != 0x00) + has_spi = 0; + } + + if (has_spi) + flashbus = BUS_TYPE_SB600_SPI; /* Force enable SPI ROM in SB600 PM register. * If we enable SPI ROM here, we have to disable it after we leave. -- cgit v1.2.3