From b7ea3a9a5d481a09229abba0fe6d2509ef2713a1 Mon Sep 17 00:00:00 2001 From: Nikolai Artemiev Date: Wed, 20 Oct 2021 22:32:25 +1100 Subject: spi25_statusreg,flashchips: add SR2 read/write support This patch adds support for reading and writing the second status register and enables it on a limited set of flash chips. Chip support for RDSR2/WRSR2/extended WRSR is represented using feature flags to be consistent with how other SPI capabilities are represented. BUG=b:195381327,b:153800563 BRANCH=none TEST=flashrom -{r,w,E} TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series TEST=logged SR2 read/write values during wp commands Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db Signed-off-by: Nikolai Artemiev Reviewed-on: https://review.coreboot.org/c/flashrom/+/58570 Tested-by: build bot (Jenkins) Reviewed-by: Anastasia Klimchuk Reviewed-by: Nico Huber --- flash.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'flash.h') diff --git a/flash.h b/flash.h index f1a8b340e..cd40fa3ff 100644 --- a/flash.h +++ b/flash.h @@ -140,6 +140,9 @@ enum write_granularity { #define FEATURE_ERASED_ZERO (1 << 17) #define FEATURE_NO_ERASE (1 << 18) +#define FEATURE_WRSR_EXT (1 << 19) +#define FEATURE_WRSR2 (1 << 20) + #define ERASED_VALUE(flash) (((flash)->chip->feature_bits & FEATURE_ERASED_ZERO) ? 0x00 : 0xff) enum test_state { -- cgit v1.2.3