From 1a119498b43a8ed934bcfa0a16465aa4d6d2c74d Mon Sep 17 00:00:00 2001 From: Peichao Wang Date: Mon, 11 Nov 2019 15:26:41 +0800 Subject: flashchips: Add W25Q128JW_DTR Port the code from chromeos flashrom BUG=b:144297264 TEST=Tested using W25Q128JWDTR in SPI mode Signed-off-by: Peichao.Wang Change-Id: Ifc28878b17dc10da2cfd8f82fffbd57adb22799e Reviewed-on: https://review.coreboot.org/c/flashrom/+/36717 Reviewed-by: Edward O'Callaghan Tested-by: build bot (Jenkins) --- flashchips.h | 1 + 1 file changed, 1 insertion(+) (limited to 'flashchips.h') diff --git a/flashchips.h b/flashchips.h index 5ef7f9cb4..2c2da6c45 100644 --- a/flashchips.h +++ b/flashchips.h @@ -939,6 +939,7 @@ #define WINBOND_NEX_W25Q128_W 0x6018 /* W25Q128FW; W25Q128FV in QPI mode */ #define WINBOND_NEX_W25Q128_V_M 0x7018 /* W25Q128JVSM */ #define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */ +#define WINBOND_NEX_W25Q128_DTR 0x8018 /* W25Q128JW_DTR */ #define WINBOND_ID 0xDA /* Winbond */ #define WINBOND_W19B160BB 0x49 -- cgit v1.2.3