From c3f765917d0e5ceb3c576ba3f3701413b92b26dc Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sun, 20 Jun 2021 14:37:55 +0200 Subject: Revert "ft2232_spi: Fix broken GPIOL cs_bits state (#126)" This reverts commit a43e44b6abbe8381be3f3dd20a430973cf8b8ab5. Nothing was broken. So this breaks everything. Well, actually only the `csgpiol` parameter. But that is very obvious. `csgpiol` was added to use a GPIO pin as /CS. But this change impli- citly hardcoded /CS to ADBUS3. Change-Id: I9ecdfe227585dda74658c16c96a57dd42d1d78b4 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/flashrom/+/55693 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Edward O'Callaghan --- ft2232_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ft2232_spi.c') diff --git a/ft2232_spi.c b/ft2232_spi.c index 78bf0fc6d..44975db35 100644 --- a/ft2232_spi.c +++ b/ft2232_spi.c @@ -226,7 +226,7 @@ static int ft2232_spi_send_multicommand(const struct flashctx *flash, struct spi msg_pspew("Assert CS#\n"); buf[i++] = SET_BITS_LOW; - buf[i++] = ~ 0x08 & spi_data->cs_bits; /* assert CS (3rd) bit only */ + buf[i++] = 0 & ~spi_data->cs_bits; /* assertive */ buf[i++] = spi_data->pindir; /* WREN, OP(PROGRAM, ERASE), ADDR, DATA */ -- cgit v1.2.3