From 96930c39524225cc55a5625e6e45d7519b3f2528 Mon Sep 17 00:00:00 2001 From: Carl-Daniel Hailfinger Date: Sat, 9 May 2009 02:30:21 +0000 Subject: Chips like the SST SST25VF080B can only handle single byte writes outside AAI mode Change SPI architecture to handle 1-byte chunk chip writing differently from 256-byte chunk chip writing. Annotate SPI chip write functions with _256 or _1 suffix denoting the number of bytes they write at maximum. The 1-byte chunk writing is cut-n-pasted to different SPI drivers right now. A later patch can move them to the generic spi_chip_write_1. Corresponding to flashrom svn r485. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Carl-Daniel Hailfinger --- ichspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ichspi.c') diff --git a/ichspi.c b/ichspi.c index 19f4b8066..e25237ad6 100644 --- a/ichspi.c +++ b/ichspi.c @@ -707,7 +707,7 @@ int ich_spi_read(struct flashchip *flash, uint8_t * buf) return rc; } -int ich_spi_write(struct flashchip *flash, uint8_t * buf) +int ich_spi_write_256(struct flashchip *flash, uint8_t * buf) { int i, j, rc = 0; int total_size = flash->total_size * 1024; -- cgit v1.2.3