1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
|
/*
* This file is part of the flashrom project.
*
* Copyright (C) 2008 coresystems GmbH
* Copyright (C) 2010 Carl-Daniel Hailfinger
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "flash.h"
static int printlock_w39_fwh_block(struct flashctx *flash, unsigned int offset)
{
chipaddr wrprotect = flash->virtual_registers + offset + 2;
uint8_t locking;
locking = chip_readb(flash, wrprotect);
msg_cdbg("Lock status of block at 0x%08x is ", offset);
switch (locking & 0x7) {
case 0:
msg_cdbg("Full Access.\n");
break;
case 1:
msg_cdbg("Write Lock (Default State).\n");
break;
case 2:
msg_cdbg("Locked Open (Full Access, Lock Down).\n");
break;
case 3:
msg_cerr("Error: Write Lock, Locked Down.\n");
break;
case 4:
msg_cdbg("Read Lock.\n");
break;
case 5:
msg_cdbg("Read/Write Lock.\n");
break;
case 6:
msg_cerr("Error: Read Lock, Locked Down.\n");
break;
case 7:
msg_cerr("Error: Read/Write Lock, Locked Down.\n");
break;
}
/* Read or write lock present? */
return (locking & ((1 << 2) | (1 << 0))) ? -1 : 0;
}
static int unlock_w39_fwh_block(struct flashctx *flash, unsigned int offset)
{
chipaddr wrprotect = flash->virtual_registers + offset + 2;
uint8_t locking;
locking = chip_readb(flash, wrprotect);
/* Read or write lock present? */
if (locking & ((1 << 2) | (1 << 0))) {
/* Lockdown active? */
if (locking & (1 << 1)) {
msg_cerr("Can't unlock block at 0x%08x!\n", offset);
return -1;
} else {
msg_cdbg("Unlocking block at 0x%08x\n", offset);
chip_writeb(flash, 0, wrprotect);
}
}
return 0;
}
static uint8_t w39_idmode_readb(struct flashctx *flash, unsigned int offset)
{
chipaddr bios = flash->virtual_memory;
uint8_t val;
/* Product Identification Entry */
chip_writeb(flash, 0xAA, bios + 0x5555);
chip_writeb(flash, 0x55, bios + 0x2AAA);
chip_writeb(flash, 0x90, bios + 0x5555);
programmer_delay(10);
/* Read something, maybe hardware lock bits */
val = chip_readb(flash, bios + offset);
/* Product Identification Exit */
chip_writeb(flash, 0xAA, bios + 0x5555);
chip_writeb(flash, 0x55, bios + 0x2AAA);
chip_writeb(flash, 0xF0, bios + 0x5555);
programmer_delay(10);
return val;
}
static int printlock_w39_tblwp(uint8_t lock)
{
msg_cdbg("Hardware bootblock locking (#TBL) is %sactive.\n",
(lock & (1 << 2)) ? "" : "not ");
msg_cdbg("Hardware remaining chip locking (#WP) is %sactive..\n",
(lock & (1 << 3)) ? "" : "not ");
if (lock & ((1 << 2) | (1 << 3)))
return -1;
return 0;
}
static int printlock_w39_bootblock_64k16k(uint8_t lock)
{
msg_cdbg("Software 64 kB bootblock locking is %sactive.\n",
(lock & (1 << 0)) ? "" : "not ");
msg_cdbg("Software 16 kB bootblock locking is %sactive.\n",
(lock & (1 << 1)) ? "" : "not ");
if (lock & ((1 << 1) | (1 << 0)))
return -1;
return 0;
}
static int printlock_w39_common(struct flashctx *flash, unsigned int offset)
{
uint8_t lock;
lock = w39_idmode_readb(flash, offset);
msg_cdbg("Lockout bits:\n");
return printlock_w39_tblwp(lock);
}
static int printlock_w39_fwh(struct flashctx *flash)
{
unsigned int i, total_size = flash->chip->total_size * 1024;
int ret = 0;
/* Print lock status of the complete chip */
for (i = 0; i < total_size; i += flash->chip->page_size)
ret |= printlock_w39_fwh_block(flash, i);
return ret;
}
static int unlock_w39_fwh(struct flashctx *flash)
{
unsigned int i, total_size = flash->chip->total_size * 1024;
/* Unlock the complete chip */
for (i = 0; i < total_size; i += flash->chip->page_size)
if (unlock_w39_fwh_block(flash, i))
return -1;
return 0;
}
int printlock_w39l040(struct flashctx *flash)
{
uint8_t lock;
int ret;
lock = w39_idmode_readb(flash, 0x00002);
msg_cdbg("Bottom boot block:\n");
ret = printlock_w39_bootblock_64k16k(lock);
lock = w39_idmode_readb(flash, 0x7fff2);
msg_cdbg("Top boot block:\n");
ret |= printlock_w39_bootblock_64k16k(lock);
return ret;
}
int printlock_w39v040a(struct flashctx *flash)
{
uint8_t lock;
int ret = 0;
/* The W39V040A datasheet contradicts itself on the lock register
* location: 0x00002 and 0x7fff2 are both mentioned. Pick the one
* which is similar to the other chips of the same family.
*/
lock = w39_idmode_readb(flash, 0x7fff2);
msg_cdbg("Lockout bits:\n");
ret = printlock_w39_tblwp(lock);
ret |= printlock_w39_bootblock_64k16k(lock);
return ret;
}
int printlock_w39v040b(struct flashctx *flash)
{
return printlock_w39_common(flash, 0x7fff2);
}
int printlock_w39v040c(struct flashctx *flash)
{
/* Typo in the datasheet? The other chips use 0x7fff2. */
return printlock_w39_common(flash, 0xfff2);
}
int printlock_w39v040fa(struct flashctx *flash)
{
int ret = 0;
ret = printlock_w39v040a(flash);
ret |= printlock_w39_fwh(flash);
return ret;
}
int printlock_w39v040fb(struct flashctx *flash)
{
int ret = 0;
ret = printlock_w39v040b(flash);
ret |= printlock_w39_fwh(flash);
return ret;
}
int printlock_w39v040fc(struct flashctx *flash)
{
int ret = 0;
/* W39V040C and W39V040FC use different WP/TBL offsets. */
ret = printlock_w39_common(flash, 0x7fff2);
ret |= printlock_w39_fwh(flash);
return ret;
}
int printlock_w39v080a(struct flashctx *flash)
{
return printlock_w39_common(flash, 0xffff2);
}
int printlock_w39v080fa(struct flashctx *flash)
{
int ret = 0;
ret = printlock_w39v080a(flash);
ret |= printlock_w39_fwh(flash);
return ret;
}
int printlock_w39v080fa_dual(struct flashctx *flash)
{
msg_cinfo("Block locking for W39V080FA in dual mode is "
"undocumented.\n");
/* Better safe than sorry. */
return -1;
}
int unlock_w39v040fb(struct flashctx *flash)
{
if (unlock_w39_fwh(flash))
return -1;
if (printlock_w39_common(flash, 0x7fff2))
return -1;
return 0;
}
int unlock_w39v080fa(struct flashctx *flash)
{
if (unlock_w39_fwh(flash))
return -1;
if (printlock_w39_common(flash, 0xffff2))
return -1;
return 0;
}
int printlock_at49f(struct flashctx *flash)
{
uint8_t lock = w39_idmode_readb(flash, 0x00002);
msg_cdbg("Hardware bootblock lockout is %sactive.\n",
(lock & 0x01) ? "" : "not ");
return 0;
}
|
