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author | Olof Johansson <olof@lixom.net> | 2014-01-08 22:08:01 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2014-01-08 22:08:01 -0800 |
commit | 708d2aa14d1eefef3dd758242787e837485baad7 (patch) | |
tree | f6966616ab3184764583ae4d6ae0e15bb44a06ac | |
parent | 4ac383ed3a12a7a56d70456403b7abd95477d840 (diff) | |
parent | 3effae8c26f451a9d572255c08dfbe342dd1dc98 (diff) | |
download | linux-stable-708d2aa14d1eefef3dd758242787e837485baad7.tar.gz linux-stable-708d2aa14d1eefef3dd758242787e837485baad7.tar.bz2 linux-stable-708d2aa14d1eefef3dd758242787e837485baad7.zip |
Merge tag 'renesas-dt-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Renesas ARM Based SoC DT Fixes for v3.14
Revert the addition of SSI clocks to DT for the
r8a7790 (R-Car H2) and r8a7791 (R-Car M2) SoCs.
Unfortunately these patches prevent booting the
r8a7790-based Lager board and r8a7791-based Koelsch board
to the point where a serial output is available.
A solution to this problem is being sought but has not
yet been finalised so in the mean time revert the changes.
* tag 'renesas-dt-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
Revert "ARM: shmobile: r8a7791: Add SSI clocks in device tree"
Revert "ARM: shmobile: r8a7790: Add SSI clocks in device tree"
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | arch/arm/boot/dts/r8a7790.dtsi | 20 | ||||
-rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 20 | ||||
-rw-r--r-- | include/dt-bindings/clock/r8a7790-clock.h | 13 | ||||
-rw-r--r-- | include/dt-bindings/clock/r8a7791-clock.h | 13 |
4 files changed, 0 insertions, 66 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index c5417dafca0d..a1791250bf4b 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -626,25 +626,5 @@ clock-output-names = "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0"; }; - mstp10_clks: mstp10_clks@e6150998 { - compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; - reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; - clocks = <&p_clk>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>, - <&mstp10_clks R8A7790_CLK_SSI>; - #clock-cells = <1>; - renesas,clock-indices = < - R8A7790_CLK_SSI R8A7790_CLK_SSI9 R8A7790_CLK_SSI8 - R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5 - R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 - R8A7790_CLK_SSI1 R8A7790_CLK_SSI0 - >; - clock-output-names = - "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", - "ssi4", "ssi3", "ssi2", "ssi1", "ssi0"; - }; }; }; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index e92c1f7aedd0..19c65509a22d 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -495,26 +495,6 @@ "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; }; - mstp10_clks: mstp10_clks@e6150998 { - compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; - reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; - clocks = <&p_clk>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>, <&mstp10_clks R8A7791_CLK_SSI>, - <&mstp10_clks R8A7791_CLK_SSI>; - #clock-cells = <1>; - renesas,clock-indices = < - R8A7791_CLK_SSI R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 - R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5 - R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 - R8A7791_CLK_SSI1 R8A7791_CLK_SSI0 - >; - clock-output-names = - "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", - "ssi4", "ssi3", "ssi2", "ssi1", "ssi0"; - }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index dbb262a3e7a6..859e9be511d9 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -104,17 +104,4 @@ #define R8A7790_CLK_I2C1 30 #define R8A7790_CLK_I2C0 31 -/* MSTP10 */ -#define R8A7790_CLK_SSI 5 -#define R8A7790_CLK_SSI9 6 -#define R8A7790_CLK_SSI8 7 -#define R8A7790_CLK_SSI7 8 -#define R8A7790_CLK_SSI6 9 -#define R8A7790_CLK_SSI5 10 -#define R8A7790_CLK_SSI4 11 -#define R8A7790_CLK_SSI3 12 -#define R8A7790_CLK_SSI2 13 -#define R8A7790_CLK_SSI1 14 -#define R8A7790_CLK_SSI0 15 - #endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */ diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 1c8f00d0d88b..30f82f286e29 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -103,19 +103,6 @@ #define R8A7791_CLK_I2C1 30 #define R8A7791_CLK_I2C0 31 -/* MSTP10 */ -#define R8A7791_CLK_SSI 5 -#define R8A7791_CLK_SSI9 6 -#define R8A7791_CLK_SSI8 7 -#define R8A7791_CLK_SSI7 8 -#define R8A7791_CLK_SSI6 9 -#define R8A7791_CLK_SSI5 10 -#define R8A7791_CLK_SSI4 11 -#define R8A7791_CLK_SSI3 12 -#define R8A7791_CLK_SSI2 13 -#define R8A7791_CLK_SSI1 14 -#define R8A7791_CLK_SSI0 15 - /* MSTP11 */ #define R8A7791_CLK_SCIFA3 6 #define R8A7791_CLK_SCIFA4 7 |